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People are doing cool things with those avrs, like making their own little nes-esque game systems. I'd love to make one to generate random video from some tiles and effects but it seems like a lot of work. I guess I'd be going off of something like this: http://avga.prometheus4.com/
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Feb 26, 2009 23:35
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All About Trout posted:People are doing cool things with those avrs, like making their own little nes-esque game systems. I'd love to make one to generate random video from some tiles and effects but it seems like a lot of work. I guess I'd be going off of something like this: http://avga.prometheus4.com/ quote:"The AVGA instantly turns any Mega AVR to a powerful* game console." All joking aside, that is a neat idea. I build a pong-like copy for fun on a FPGA a while back - vhdl is a bitch in my opinion, but you can do some pretty badass stuff on an FPGA if you know what you're doing.
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Feb 27, 2009 01:48
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quote:Is it possible to mix assembly in with arduino code? Always wanted to try it, since it would make them a lot more flexible. In my cases where the arduino IO functions were too slow (lots of boundary checks, PWM-related functionality, etc) I replaced them with C register writes and that solved the bottleneck. quote:In general they're find as long as you don't mind the loss of certain I/O pins and you don't need fast serial communication. Since you mentioned FPGAs, I almost picked up one of these boards last year: http://www.digilentinc.com/Products/Detail.cfm?NavTop=2&NavSub=423&Prod=S3EBOARD
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Feb 27, 2009 03:54
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Cross_ posted:Since you mentioned FPGAs, I almost picked up one of these boards last year: I got this guy for Christmas: http://www.digilentinc.com/Products/Detail.cfm?Prod=BASYS&NavTop=2&NavSub=457&DetailType= I wish I had gotten the Nexsys, though, for all the extra IO. I'm having trouble thinking of neat projects, though.
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Feb 27, 2009 04:24
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In order to drive a 3 volt LED off of a 1.5v source, I came across the following schematic: (I was trying to put together a circuit akin to this) : http://www.edn.com/contents/images/601829f1.pdf When I went to simulate it, something very odd happened; it wouldn't work unless I *completely removed* the voltage source...Can someone with more circuit-wizardry-knowledge explain to me what's going on here? (http://www.falstad.com/circuit) code:
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Feb 27, 2009 05:22
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ANIME AKBAR posted:Is it possible to mix assembly in with arduino code? Always wanted to try it, since it would make them a lot more flexible. I've been writing to registers directly on the Arduino to control some PWM stuff, seems to work alright. It's kind of a pain sometimes though, and there are a LOT of limitations to what you can and cannot do. Some things are going to be just flat-out easier in full assembly (anything beyond just simple register control and invoking some peripheral hardware probably needs this). For Blackfins and ARMs, uCLinux is prettymuch the only way to fly when it comes to free platforms for those architectures. Labview is great but not really in the reach of hobbyists (if you have access, lucky you). I've got a huge project I've been doing on the Blackfin, unfortunately just getting the darn thing to boot is proving to be problematic enough (grr SPI why are you so hard to deal with?). FPGAs are sweet little beauties, and you can do some CRAZY stuff with them. Like, oh, crack SHA-1 codes at absurd speeds or help make your supercomputer more 'super'. Really they've gone from esoteric curiosity to amazing enabler for all sorts of crazy projects that wouldn't be possible otherwise, and somebody is probably going to use them to take over the world someday. When programming FPGAs, make sure to take the time to learn Verilog properly (or enough to know the difference between blocking and nonblocking assignment, how to simulate a design, and how to write a basic test case). There are unfortunately few tutorials on it, although there are plenty of books and tons of code examples. It's NOT a computer programming language, and if you treat it as such you will get crappy modules that don't work half the time. Also, companies will hire you on the spot if you mention that you know what Verilog is, that you've messed with it once or twice, or that you know a guy who knows a guy who programs verilog. That's not even that exaggerated. It's a great skill to develop for the budding engineer, and it's going to be a major skill for hardware hackers for a long time to come. Same goes for VHDL, although I see far more projects in Verilog now... clredwolf fucked around with this message at 06:02 on Feb 27, 2009 |
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Feb 27, 2009 06:00
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clredwolf posted:Also, companies will hire you on the spot if you mention that you know what Verilog is, that you've messed with it once or twice, or that you know a guy who knows a guy who programs verilog. That's not even that exaggerated. It's a great skill to develop for the budding engineer, and it's going to be a major skill for hardware hackers for a long time to come. Same goes for VHDL, although I see far more projects in Verilog now... I'm gonna have to white-night the VHDL here  . Most companies are either Verilog or VHDL houses, and both are quite common (or so I'm told, I come from the vhdl side). If you happen to be familiar with the language that the company uses, good for you. If you don't, and you're a competent digital designer, no worries!It's all syntactic sugar anyway. They can both do the same stuff in the end, but personally, I like VHDL and I think it seems to be more supported/used. In either case, when dealing with an HDL, it's important to always know what actual circuitry you want to implement. Once you know that, you should be able to figure out the language. In a way, its like assembly programming - unless you know the underlying hardware and what you want to do with it, you won't get far. And to your comment about LabVIEW, you'd be surprised what you can get from companies if you call them and ask nicely (esp. if you're a student) - many times you can get either free or very reduce cost software/hardware by asking nicely. Think about it - they know that if you are familiar with their products, you're more like to use them once you're out of school. This applies to other items such as well; when I did my senior project, I got a $200 evaluation board from Analog Devices for free, just because I asked.
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Feb 27, 2009 07:20
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Cross_ posted:Since you mentioned FPGAs, I almost picked up one of these boards last year: That is actually the board I built the pong clone on. The VGA connector was just begging to utilized 
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Feb 27, 2009 08:48
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Whompy posted:In order to drive a 3 volt LED off of a 1.5v source, I came across the following schematic: (I was trying to put together a circuit akin to this) : http://www.edn.com/contents/images/601829f1.pdf this is a pretty neat circuit. It's essentially a buck supply but it uses the LED in place of where the flyback diode usually is, instead of a load. I'll try and explain it later when I've got the time. edit: okay, upon further inspection it's not precisely like a buck supply because it uses low side switching, but the theory is the same. It's easier to understand if you cut just focus on the switching part of it. Take a look at this: code:This switching model is similar to what you might use when driving a DC motor or a magnetic buzzer. In such cases, the inductor (buzzers and DC motors can be seen as inductors) is what you're trying to deliver power to. The diode is called a flyback diode, and its purpose is to provide a path for the inductor current when the bjt turns off. When driving buzzers or motors, all the power dissipated over this diode is simply lost. However, as an LED driver it works quite well, because you use an actual inductor, meaning it can have very low losses, and all your power will be dissipated over the diode, which can easily be an LED. There are some catches, though. First, this circuit delivers short bursts of high current to the LED, as opposed to a constant current. Some types of LEDs won't handle this well, but most white LEDs will be okay. A way of eliminating this concern is to rectify the output current and put a bypass capacitor in parallel with the LED. The extra diode and the capacitor will take the big hits of current, while the current in the LED will be smoothed out. Here's an example of this. code:Anyways, it's a pretty cool concept. It should be easy to get great efficiency, and it can drive loads at voltages both above and below the supply voltage. ANIME AKBAR fucked around with this message at 17:27 on Feb 27, 2009 |
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Feb 27, 2009 15:03
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clredwolf posted:For Blackfins and ARMs, uCLinux is prettymuch the only way to fly when it comes to free platforms for those architectures. Labview is great but not really in the reach of hobbyists (if you have access, lucky you). I've got a huge project I've been doing on the Blackfin, unfortunately just getting the darn thing to boot is proving to be problematic enough (grr SPI why are you so hard to deal with?). quote:FPGAs Yeah I totally agree. My school offers a course in practical use of FPGAs where you use a dev board and learn to use VGA, rs232, keyboard and mouse interface, and eventually build a working calculator (most of the work is getting the VGA and keyboard working, from what I've heard). I'll certainly take it next semester. From what I know, you can use Verilog, VHDL, and also some neat state machine generators.
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Feb 27, 2009 15:08
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Oh man, why doesn't NCSU offer that? That sounds like an amazingly useful course! Definitely take it if you can. You can use VHDL or Verilog for FPGAs, along with wire schematics, ADL, and a slew of other methods. Verilog is by and far the dominant one, and it's based (loosely) off of C, written originally by engineers at Cadence. VHDL is based off of ADA, and was written by the US Department of Defense. Both can be picked up, it's my opinion that Verilog (esp with the 2001 changes) is better, but others would beg to differ. Verilog itself is used a LOT in industry (esp in the US, I hear Europe likes VHDL more), so if you want to ultimately get a job with this stuff Verilog is a great skill to know. Just remember, reg =/= register, blocking for combinational logic, non-blocking for sequential/register logic, and BY GOD DO NOT GET CREATIVE WITH CLOCKS! If you have to send your clock through a gate before it clocks a flip-flop, it's the same deal as using 'goto' in C (I slash your car tires). For uCLinux, I agree, it is kinda scary giving all that control to the Kernel. It does simplify a lot though, and it's nice to be able to just telnet into your microcontroller. It's a huge tradeoff.
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Feb 27, 2009 16:58
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Freshman year I took an intro to digital course in which we used a tiny bit of VHDL. IIRC it just culminated in building a simple 8 bit ALU or something. And yeah. I've seen what clocks can do to people. For some reason people just love to gate and split it and crap. I've seen people's projects that only work if the clock is scaled down to like 10KHz because of the ridiculous glitches they get.
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Feb 27, 2009 17:07
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Cross_ posted:Since you mentioned FPGAs, I almost picked up one of these boards last year: I've got one of these, as well as an Altera DE2-70. For a beginner, I can't recommend the Spartan kit enough. The user manual is very well-written--it's practically a tutorial for how to use the peripherals on the board. You'll have to get a working knowledge of Verilog/VHDL first, but once you do you can do alot with this board. To add fuel to the Verilog/VHDL fire, I've been programming heavily in VHDL for the past two years or so, and I absolutely hate it. I can get things done and it works fine, but it's just so goddamn verbose. On the other hand, I like Verilog, but there's one thing I still haven't figured out. From what I understand, it's based on C, no? Why on earth did they choose to use begin/end instead of curly braces? Could they think of no other way to implement the concatenate and repeat operators or something?
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Feb 27, 2009 17:50
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FPGA hardware engineer checkin into the thread I've used both Verilog and VHDL, and I like Verilog a lot better. VHDL has a ton of libraries that need to be included with any useful design, and feels like it requires you to declare things over and over again. "Verbose" is the right way to describe that language. It is very anal about variable types, and there are a ton of variable types plus heaven forbid you mix them. Verilog is simpler, in my opinion. Note that this can be both a good thing and a bad thing. Everything in Verilog is just considered a 'bit', and it's generally up to the designer to keep track of things like whether a variable is signed or unsigned, etc. Verilog has operators for that stuff but nobody really uses them. Most companies do tend to be either Verilog-only or VHDL-only. One 'extra' detail to add to the mix is the brand of FPGA that company uses. All of the 'big three' FPGA companies (Xilinx, Altera, and Lattice) have excellent support Verilog in their actual FPGA design tools (ISE for Xilinx), but they all favor one language or the other in their embedded development environments. Altera and Lattice are Verilog-friendly companies. A lot of the IP they provide in their embedded dev kits are Verilog. Xilinx, on the other hand, codes all of their EDK in VHDL and seems to have some kind of a grudge against Verilog. Their customer support center also only seems to know VHDL and if you call them up and even mention by accident that you're stupid enough to use Verilog in any EDK design then they drive to your hours and rape you until you die.  TLDR: Verilog is better than VHDL but it's a real pain meshing Verilog designs with Xilinx's EDK Poopernickel fucked around with this message at 18:46 on Feb 27, 2009 |
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Feb 27, 2009 18:14
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Also, FPGAs are really very powerful tools and everybody should learn to use them. You can actually put a whole microcontroller into an FPGA and still have a ton of room for doing digital logic (things like ADC/DAC interfaces, hardware dividers, barrel shifters, DSP algorithms, custom input/output peripherals, etc).clredwolf posted:Just remember, reg =/= register, blocking for combinational logic, non-blocking for sequential/register logic, and BY GOD DO NOT GET CREATIVE WITH CLOCKS! If you have to send your clock through a gate before it clocks a flip-flop, it's the same deal as using 'goto' in C (I slash your car tires). One thing to keep in mind is that there are often advantages in clarity to using split clocks. For example, say I have a process I need to sample at 20kSps and a 1MHz clock. I can simplify the timing constraints on much of the design (and also make it easier to understand at a glance) by dividing 1MHz down to 20kHz and then using 20kHz for all sampling-related processes. This kind of clock management is fine (and even encouraged) but keep in mind that an FPGA typically has a limited amount of clock resources. As far as gating clocks goes, it's worth noting that clock gating is a totally normal procedure in an ASIC. It's also very intuitive - turn the clock off and your 'always' loop stops functioning. However, every FPGA mapper tool I've used will bitch at you about gating clocks, because it's wasteful of FPGA clock resources and it's also easy to gently caress yourself up. They all encourage using clock enables instead. Poopernickel fucked around with this message at 18:38 on Feb 27, 2009 |
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Feb 27, 2009 18:22
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Agreed, clock gating is great but there's definitely a right and wrong way to do it. I'm talking more about, oh, using XOR gates and buffers to offset clocks, to generate a clock with 10% duty cycle INSTEAD of using the PLLs already onboard the FPGA. Don't do that. Don't. Ever. Do. That. Also, Xilinx is the ATI of the FPGA world in my opinion. Their stuff is great, but a lot of their software just makes me wonder what the heck they were thinking. Then again, everytime I look at how the Quartus GUI is laid out I think the same thing... (not like ISE is much better) I've also heard various people tell me that Altera FPGAs tend to be faster, although to me that's like saying a .44 kills a little better than a .357 when you shoot someone in the face.
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Feb 27, 2009 20:16
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clredwolf posted:Agreed, clock gating is great but there's definitely a right and wrong way to do it. I'm talking more about, oh, using XOR gates and buffers to offset clocks, to generate a clock with 10% duty cycle INSTEAD of using the PLLs already onboard the FPGA. Don't do that. Don't. Ever. Do. That. The funny thing about Xilinx is I actually like ISE a lot. I don't have much trouble with the interface, and its built-in simulator has all of the functionality I need. Their 'Coregen' works pretty well, and it all integrates without too much trouble (once you get used to the program). It's the EDK that I reeeeaaaalllly can't stand.  The Altera NIOS suite is really much better designed.I have also heard that Altera's FPGAs have a small edge on speed, but Xilinx definitely wins on logic density. Xilinx's larger offerings have such an immense amount of logic on them that it's pretty much impossible to use it all up. I primarily work with the Virtex 4FX60 right now, and that thing is a fuckin madman. 2 on-board PowerPCs? 400Kb of RAM? 128 hardware multipliers? 25,000 slices (each of which could be a register or two lookup tables)? Beam me up. And that FPGA is only a quarter as beefy as Xilinx's top-of-the-line. Xilinx's FPGAs are also regarded as more durable than Altera's. I've accidentally run Xilinx FPGAs off of higher than the max rated voltage, I've static-shocked pins, I've run negative-voltage signals to their inputs by mistake, I've even managed to break off some power pins. And in all this time I've never managed to actually _destroy_ a Xilinx FPGA. I am sure it can be done but I've never seen it happen. Have you ever worked with Lattice's offerings? I know they pretty much own the 'budget' FPGA market, but I've never really used their products. Poopernickel fucked around with this message at 21:19 on Feb 27, 2009 |
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Feb 27, 2009 21:09
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Poopernickel posted:One thing to keep in mind is that there are often advantages in clarity to using split clocks. For example, say I have a process I need to sample at 20kSps and a 1MHz clock. I can simplify the timing constraints on much of the design (and also make it easier to understand at a glance) by dividing 1MHz down to 20kHz and then using 20kHz for all sampling-related processes. This kind of clock management is fine (and even encouraged) but keep in mind that an FPGA typically has a limited amount of clock resources. I disagree. Gating clocks in an FPGA makes timing related stuff way more difficult, because now you have to account for delays on your clock net through logic elements and such. This makes timing analysis very, very hard and will introduce a poo poo ton of jitter on your clock net. And the absolute last place you want jitter is on your clock net. And it can introduce timing problems that occur on compile to compile, depending on how logic get rolled together. It's ok if your data glitches, just so long as its enough before your clock edge. If your clock glitches, then all sorts of bad stuff can happen. Use clock enables - that's what they're their for.
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Feb 27, 2009 21:22
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I haven't used a Lattice, I've only worked with Xilinx and Altera FPGAs. We're looking to use some generic FPGAs for random data routing, I'll have to look into them and give them a try. Provided their software isn't terrible...
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Feb 27, 2009 21:25
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clredwolf posted:I haven't used a Lattice, I've only worked with Xilinx and Altera FPGAs. We're looking to use some generic FPGAs for random data routing, I'll have to look into them and give them a try. FWIW, I've heard that their tools kinda suck and aren't supported anywhere near as nice as xilinx/altera. Also keep in mind that both Xilinx and Altera have lower end FPGA lines, so I wouldn't rule them out. Maybe Lattice has a cost edge when you're dealing with really high volume?
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Feb 27, 2009 21:29
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I was looking around, their prices are better than a comparable Altera Cyclone III chip ($47 vs $60 for a 16k LUT). I don't think they're all that much better than some of the Cyclone II chips ($42 for 20k gates). Not exactly sure how to compare the speed grades, but the Lattice might be a faster chip. We've already got Xilinx and Altera chips to mess with (yay 2nd hand electronics) so it's not like we're looking to strongly switch. There was some talk of making an 'FPGA Shield' for an Arduino though, for some of our really complex tasks. We had a low, low end Cyclone II in mind for that one, maybe bumped up to a Cyclone III if we don't go crazy making it... Anyone have experience with open source JTAG tools (hardware and software)? Do they work for FPGAs at all?
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Feb 27, 2009 21:40
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ANIME AKBAR posted:Yeah I totally agree. My school offers a course in practical use of FPGAs where you use a dev board and learn to use VGA, rs232, keyboard and mouse interface, and eventually build a working calculator (most of the work is getting the VGA and keyboard working, from what I've heard). I'll certainly take it next semester. From what I know, you can use Verilog, VHDL, and also some neat state machine generators. Our VHDL class used a Xilinx 500k Gate chip, and culminated in... A device that would act as a 3 digit counter and 4 bit multiplier, output to 7 segment displays, with a mode switch between the two. Some of the abysmal failures of the course managed to take up 25k gates with that bad boy, though.
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Feb 27, 2009 21:44
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clredwolf posted:I was looking around, their prices are better than a comparable Altera Cyclone III chip ($47 vs $60 for a 16k LUT). I don't think they're all that much better than some of the Cyclone II chips ($42 for 20k gates). Not exactly sure how to compare the speed grades, but the Lattice might be a faster chip. Another price to factor in (especially if you're working in small volumes) is the price of the development software. I know that Xilinx/Altera will basically take out your wallet and poo poo in it when you call them up to license some tools, and they will continue to do so every year for the rest of your unhappy life. If you need the EDK license, it just keeps getting more and more "groovy." edit: Although, depending on your needs and the license agreement you might be able to just use their free webpacks for your development. Poopernickel fucked around with this message at 22:03 on Feb 27, 2009 |
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Feb 27, 2009 22:00
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clredwolf posted:Anyone have experience with open source JTAG tools (hardware and software)? Do they work for FPGAs at all? I've never used any open-source software for doing FPGA programming, but I looked into the available options a few months ago and was pretty disappointed. There are a lot of open-source IP cores, soft processors, and related software. However, there isn't much out there that actually deals with synthesis / place-and-route or compiling bitstream files, or with JTAG loading of the FPGA/PROM.
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Feb 27, 2009 22:06
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Hmm ok, I'm working on a program to program an FPGA over a modified SPI port (using serial programming, not JTAG programming). Slow, yes, but if it works I don't care. Obviously JTAG would be very nice, but if it's not there it's not there.
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Feb 27, 2009 22:21
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Poopernickel posted:Another price to factor in (especially if you're working in small volumes) is the price of the development software. I know that Xilinx/Altera will basically take out your wallet and poo poo in it when you call them up to license some tools, and they will continue to do so every year for the rest of your unhappy life. If you need the EDK license, it just keeps getting more and more "groovy." If you're a student, usually the webpack is good enough, and if you really need a license they might just comp you one (or give you a large discount). EDK might be a little bit different though, but playing the student card can get you pretty far. However my company does enough business with Xilinx to where we don't pay for any dev tools, so I may be a little out of touch.
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Feb 27, 2009 22:23
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SnoPuppy posted:If you're a student, usually the webpack is good enough, and if you really need a license they might just comp you one (or give you a large discount). EDK might be a little bit different though, but playing the student card can get you pretty far. woah, how do I hook that up? What kind of volumes do you guys buy?
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Feb 27, 2009 22:37
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Poopernickel posted:woah, how do I hook that up? What kind of volumes do you guys buy? Not sure on actual numbers/volumes, but I think the dollar amount is a few million.
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Feb 27, 2009 23:35
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That's a big number of FPGAs man. Guess Xilinx figured they make enough off you anyways 
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Feb 27, 2009 23:38
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I am looking for some easy projects to do for a Eagle layout tutorial my IEEE student branch is considering putting on. The idea is have a few sessions over a couple weeks where we design something, do the layout, order it, and do a soldering party on the last week so people can take home their projects. I think this would be fun, and am just trying to brainstorm some easy/simple/cheap but worthwhile projects. Some ideas so far - Simple LED blinker/RGB color shifter, something easy and nice looking, but not relatively useful or technical. Maybe little keychain flashlights (maybe even that white LED circuit from earlier!), although this would probably require a enclosure of some sort. TV-B-Gone - One of the IEEE members really wants to do a soldering contest ("speed soldering") and she thought this project would be awesome; whoever turns off the TV first wins... something. The goal really is to find the most interesting and complicated device we can find that will fit in less than a 1"x1" space. I am trying to balance the desire for a challenging layout with the desire for an easy project as I don't want to get bogged down on details, and having something cool and useful would be a plus. What say you EE goons? All this FPGA talk is making my eepenis feel very small... and yet, very hard 
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Feb 28, 2009 04:19
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Headphone amp? You may have to resort to SMDs but you can use larger ones (1206).
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Feb 28, 2009 05:28
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Okay guys, a big one for ya. Wasn't sure if I should start this as another thread, but here goes. I recently picked up this LED matrix at a surplus shop:   The only problem is I have no idea how to drive it. I've played around with it a bit and made a few discoveries. I've managed to at least figure out how the LEDs are arranged:  The entire matrix is split into a 2x8 grid, with each cell containing 8x4 (ie, 32) LEDs. Power is supplied to each column by one of the 8 power transistors on the left (you can see the thick traces running from left to right). The LEDs in a given cell are then wired to the bank of resistors (circled, on the left). LEDs along the bottom half (Row B) are wired to the lower 32 resistors. LEDs in the top half (Row A) are wired to the top 32 resistors. So, for example, if one were to apply voltage to the central pad of column 6, the LEDs in cell B6 would be illuminated sequentially by sweeping a ground connection along the bottom 32 resistors. The LEDs in cell A6 would be illuminated sequentially by sweeping a ground connection along the top 32 resistors. Each of resistors, all 64 of them, are wired to 8 UCN5821 chips each with 8 outputs (8 x 8 = 64). Here is a close-up of the logic circuitry:  Here the connections between the LEDs, resistors, and UCN5821 chips is clear. The ICs present are as follows: UCN5821: 8-bit serial latch AM26LS31: Quadruple differential line driver SN74LS15: 3-input AND gate M74HC238: 3-to-8 decoder. I'm an RF guy, not a digital guy, so this is all pretty foreign to me. I basically understand everything up the UCN5821s. I have no idea how to feed data into this or how to clock it. I'm hoping that it might resemble some sort of "standard" LED matrix architecture. Help me out guys! I really want to get one working - there are a whole lot more where this one came from! I will provide as much additional information as requested. Cyril Sneer fucked around with this message at 06:47 on Feb 28, 2009 |
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Feb 28, 2009 06:43
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Drawing out a schematic of how things are connected would be useful. The serial to parallel chips are fairly normal. Generally you shift in your data serially and then clock it to the output pins. This way you only need 1 serial connection for any number parallel connections. I imagine that all the LED serial/parallel chips are connected together such that the serial out of one feeds into the serial in of the next one. As for how to drive it, you can probably get away with bit banging it out of a micro controller. Maybe even a PC parallel port. Is the UCN5821 in the middle of the resistors connected to the power supplies? Not sure what the differential drivers and other stuff is for, but I imagine it's related to turning on the power supply transistors.
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Feb 28, 2009 07:34
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Cyril Sneer posted:Okay guys, a big one for ya. Wasn't sure if I should start this as another thread, but here goes.
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Mar 1, 2009 00:53
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Cyril Sneer posted:Okay guys, a big one for ya. Wasn't sure if I should start this as another thread, but here goes. That looks like the LED sign that the guys at hacklab.to recently reverse-engineered. Informative blog post here: http://www.andrewkilpatrick.org/blog/?page_id=795 Also try their IRC channel at #hacklabto on Freenode if you have more questions. Edit: Did you get that at Active Surplus? Mill Town fucked around with this message at 01:11 on Mar 1, 2009 |
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Mar 1, 2009 01:08
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Mill Town posted:That looks like the LED sign that the guys at hacklab.to recently reverse-engineered. Informative blog post here: My god, thats EXACTLY what I'm trying to do. And yes, I did get it at Active Surplus. Looks like I'll be emptying their stock tomorrow
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Mar 1, 2009 01:25
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Cyril Sneer posted:My god, thats EXACTLY what I'm trying to do. And yes, I did get it at Active Surplus. Looks like I'll be emptying their stock tomorrow You can also visit the hacklab and talk to the guys who got it working. http://hacklab.to
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Mar 1, 2009 03:49
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ANIME AKBAR posted:this is a pretty neat circuit. It's essentially a buck supply but it uses the LED in place of where the flyback diode usually is, instead of a load. I'll try and explain it later when I've got the time. It's a boost converter, the low side switching is irrelevant to the classification, and indeed the only way to sensibly implement it, unless you're a masochist or only have access to p-channel devices.
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Mar 1, 2009 09:54
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Picked up another 6 of those panels. Hope they all work - this is gonna be a wicked project.
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Mar 1, 2009 21:52
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Cyril Sneer posted:Picked up another 6 of those panels. Hope they all work - this is gonna be a wicked project. drat, thats almsot exactly how I designed my LED sign 18 years ago. The UCN5821 chips are almost guaranteed to be sinking the current with the power transistors driving it. Once thing to be mindful of when hooking up a microcontroller to it is that you cannot let a single row stay on too long, as the LEDs are being overdriven so as to compensate for the fact that a single row is only on 1/8th of the time.
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Mar 2, 2009 07:48
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