Colostomy Bag posted:

Showing my age, but I always thought it was cool to get Kickstart images for the Amiga (the leaked ones with the dev notes during the 2.0 and 3.0 releases) and they would go to great lengths explaining how they saved 200 bytes here or 30 cycles there.

Granted it was a different time and obviously a programmers time is cheaper than storage and my god they had storage constraints to keep to. But as we both know the pendulum swings and perhaps someday we will get back to efficient code.

Toops posted:

The problem is, a lot of developers in the gaming industry are the worst kind of programmers. They're code-closet cowboys who think they're geniuses because no one can read their tangled web of spaghetti vomit, when in actual fact, they're junior-level hackers who couldn't write a hello world without stack.

Colostomy Bag posted:

Guess what I'm implying is the bloat is going past Moore's law. Lax underlying APIs, ABIs and other issues have bloated code (and more importantly assets) into a 'let's throw the kitchen sink into it' because what the hell, storage is cheap and we need the drat to compile.

Tank Boy Ken posted:

Because the Crusaders went there on a party: https://en.wikipedia.org/wiki/Crusades

Duckaerobics posted:

Moore's law for silicon technologies is almost done, and I don't think we will see industry go below 4nm.

Duckaerobics posted:

Semiconductor technology is really interesting right now, and I think we are in a swing toward more efficient code. We are rapidly approaching the physical limits for minimum feature size on silicon based transistors, and industry has been slow to adopt new technologies. A large part of the improvements to processor speed over the past 10 years or so has been from architecture and multi-threading rather than an increase in the number of transistors. Moore's law for silicon technologies is almost done, and I don't think we will see industry go below 4nm.

Pope Corky the IX posted:

Do you think Ben is aware that the decrease in feeling within his lower extremities is not normal?

Toops posted:

gently caress that dude. If you write lovely code because you let yourself get pushed around, if you don't have the backbone to either change the system or quit, then you're a lovely developer. It doesn't matter how "good" you are in theory. This is Star Citizen doublethink. "They're actually really good developers, they just write poo poo code that doesn't work because" reads a lot like "This game is really amazing it's just an unplayable pile of poo poo right now because"

Hav posted:

Processor cycles will always be cheaper than programmer time, but the moore's law expansion means that we have a lot of headroom for inefficiency, which is one of the reasons why we're interpreting rather than compiling most of the time. There hasn't really been much of change since OO arrived, though. RISC came and went with the vastly increased clock speeds. XK has a better handle on processors, but we went from optimising queries in 1997 to throwing in abstraction layers to increase portability in 2003 and finally to devolving things into key/value stores and nosql at around 2010.

Mirificus posted:

Toops posted:

Do you think he's ever experienced much feeling in his lower extremities? I mean, nothin' from nothin' ain't nothin'.

XK posted:

RISC was awesome back when assembly language opcodes were hardwired silicon. Long pipeline 5 ghz CPUs were awesome before they hit physical limits on silicon speed and complexity limits on the pipelines.

RISC is out of fashion for general purpose CPUs, and Intel chucked NetBurst architecture in the bin, for a reason.

XK posted:

RISC was awesome back when assembly language opcodes were hardwired silicon. Long pipeline 5 ghz CPUs were awesome before they hit physical limits on silicon speed and complexity limits on the pipelines.

RISC is out of fashion for general purpose CPUs, and Intel chucked NetBurst architecture in the bin, for a reason.

Now everything is running hard toward parallel processing, which I believe we're just past the infancy and into toddler stage for CPUs. GPUs are really wonderful there (NVIDIA TITAN Xp, 3840 shader processors, imagine a 3840 core CPU) but have much simpler instruction sets, and vastly less issues with data interdependency, than a general purpose CPU. This is why modern graphics cards are so mind blowing, and wreck CPUs at very special purpose types of scientific calculations.

You can't even write assembly at the silicon level anymore. Modern CPUs take assembly language opcodes, like the highly complex x86_64 instruction set, and run it through an interpreter before the actual desired operation ever hits the silicon gates that calculate it. That's what the microcode on CPUs is. The more complex the op is, or the less likely it is to occur, the more likely it will be implemented purely in microcode.

The "bare metal" assembly language is broken down into even simpler OPs on the silicon via the microcode instructions. There's like ~3,500+ distinct x86_64 instructions. Try hardwiring that in silicon without both blowing up your die size and having a pathological flaw. Some of the registers can't even be touched except by the microcode. The registers cited in the object code often even aren't real, and only exist ethereally. There's kind of a RISC-like thing going on under the hood of the CPU itself, where a single asm instruction gets implemented via multiple lower level operations, and tricks behind the curtain. You can never see or touch any of that unless you have Intel/AMD microcode encryption and signing keys. The CPU itself is basically a loving a VM environment.

We essentially have a shadow RISC on modern CPUs, and threw away deep pipelines for multiprocessing. Plus, we also gained a lot of a multiprocessing on each individual core, which can run handfuls of operations and calculations side by side all alone, single threaded, with any spare resources going into hyperthreading via virtual cores.

We utilized all this amazing technological development in making super powerful CPUs, and bundling 8 or more on a postage stamp, sold for a few hundred bucks, as an excuse to make lovely inefficient code because now processing is cheap.

Now Chris Roberts is abusing all this to make 750k poly ships you can shove a vending machine into.

I just wrote all of this because I'm pouring one out on the floor for all my homies: those countless processing cycles lost to cheap inefficiency.

Pope Corky the IX posted:

You are a terrible person.

Mirificus posted:

Hav posted:

trap sprung.

Pope Corky the IX posted:

Spring all the traps you'd like, I'll still take advantage of every one of you. Especially now that your Lord has abandoned you.

XK posted:

lol

I think I take some of this almost personal.

People like Archimedes, Euclid, Pythagoras, Euler, and countless others throughout history, changed the course of human history scratching out equations by hand, many of them on wax tablets.

Now, more calculations than all of them ever did collectively, in their entire lives, are used to push around a Starfarer.

Hav posted:

tane

Colostomy Bag posted:

ARM? Given it's acronym, fairly prevalent as a RISC architecture. But yeah, in general RISC was the second coming of Christ and never panned out and like you said most CISC instructions are decoded into basic RISC instructions.

quote:

SPARC/MIPS had a ton of registers. But there was a caveat, there were "register windows" where you need to slide them around.

Pope Corky the IX posted:

Would you rather by mouth gently pass by your pubic hair, or let some corporate rear end in a top hat dictate the rest of your life?

Pope Corky the IX posted:

Especially now that your Lord has abandoned you.

Hav posted:

There's a reason I noped out of assembly really early, and it was mostly everything you wrote. 'The' metal is like my relationship to music; I admire from afar, rather than being involved with. Once I had aspirations, but now I mainly make sure there is access to pictures of cats.

XK posted:

I love ARM, for low power draw, and low chip cost. CISC just beats it when you can plug into a wall, and when larger die size isn't an issue. CISC, counterintuitively, will beat RISC, on pure speed, due to instruction efficiency. The much wider instruction set allows more efficient code usage, cutting down on code fetching and decoding, simply because you have a wider selection of operations to choose from, and can choose the very precise operation you need. Bizarrely, 20 years ago, the opposite was true, and the fixed instruction size of RISC was faster.


poo poo like this is a nightmare. Invisible microcode handling the actual silicon registers is so much better. Hardware dynasties were won and lost because something was easy or hard to program for.

Pope Corky the IX posted:

You are a terrible person.

XK posted:

RISC was awesome back when assembly language opcodes were hardwired silicon. Long pipeline 5 ghz CPUs were awesome before they hit physical limits on silicon speed and complexity limits on the pipelines.

RISC is out of fashion for general purpose CPUs, and Intel chucked NetBurst architecture in the bin, for a reason.

Now everything is running hard toward parallel processing, which I believe we're just past the infancy and into toddler stage for CPUs. GPUs are really wonderful there (NVIDIA TITAN Xp, 3840 shader processors, imagine a 3840 core CPU) but have much simpler instruction sets, and vastly less issues with data interdependency, than a general purpose CPU. This is why modern graphics cards are so mind blowing, and wreck CPUs at very special purpose types of scientific calculations.

You can't even write assembly at the silicon level anymore. Modern CPUs take assembly language opcodes, like the highly complex x86_64 instruction set, and run it through an interpreter before the actual desired operation ever hits the silicon gates that calculate it. That's what the microcode on CPUs is. The more complex the op is, or the less likely it is to occur, the more likely it will be implemented purely in microcode.

The "bare metal" assembly language is broken down into even simpler OPs on the silicon via the microcode instructions. There's like ~3,500+ distinct x86_64 instructions. Try hardwiring that in silicon without both blowing up your die size and having a pathological flaw. Some of the registers can't even be touched except by the microcode. The registers cited in the object code often even aren't real, and only exist ethereally. There's kind of a RISC-like thing going on under the hood of the CPU itself, where a single asm instruction gets implemented via multiple lower level operations, and tricks behind the curtain. You can never see or touch any of that unless you have Intel/AMD microcode encryption and signing keys. The CPU itself is basically a loving a VM environment.

We essentially have a shadow RISC on modern CPUs, and threw away deep pipelines for multiprocessing. Plus, we also gained a lot of a multiprocessing on each individual core, which can run handfuls of operations and calculations side by side all alone, single threaded, with any spare resources going into hyperthreading via virtual cores.

We utilized all this amazing technological development in making super powerful CPUs, and bundling 8 or more on a postage stamp, sold for a few hundred bucks, as an excuse to make lovely inefficient code because now processing is cheap.

Now Chris Roberts is abusing all this to make 750k poly ships you can shove a vending machine into.

I just wrote all of this because I'm pouring one out on the floor for all my homies: those countless processing cycles lost to cheap inefficiency.

Ramadu posted:

this owns lmao

current humans are the best humans lmao

quote:

At the capture of Syracuse Marcellus had been aware that his victory had been held up much and long by Archimedes’ machines. However, pleased with the man’s exceptional skill, he gave out that his life was to be spared, putting almost as much glory in saving Archimedes as in crushing Syracuse. But as Archimedes was drawing diagrams with mind and eyes fixed on the ground, a soldier who had broken into the house in quest of loot with sword drawn over his head asked him who he was. Too much absorbed in tracking down his objective, Archimedes could not give his name but said, protecting the dust with his hands, “I beg you, don’t disturb this,” and was slaughtered as neglectful of the victor’s command; with his blood he confused the lines of his art.

Toops posted:

Uh oh