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feedmegin posted:Not actually EVERYONE as it happens. Your phone isn't running on Intel and its not like they haven't tried. These days, neither is your Mac. I meant at the time when x86 made it look like things were over, of course. What's happening now is arguably history repeating itself. The success and huge sales volume of the IBM PC (and its clones) allowed the x86 ISA to invade and ultimately dominate markets way above its humble origins. Today, Arm is in that role: it's the traditionally lower-spec architecture taking advantage of living in a much higher volume market to invade upwards. You even see people making the same mental mistakes. Back in the day, people used to scoff at the idea that x86 could take on the workstation and server markets. Recently, we've seen many similar opinions about Arm; people assume there's some intrinsic property which makes x86 faster. It's not inevitable that all PCs will be using Arm CPUs in 5 or 10 years, but I do think we're in an inflection point where that could happen. It depends a great deal on Microsoft having the desire and competence to push it forwards.
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# ? Jun 28, 2021 00:23 |
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# ? May 28, 2024 16:14 |
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BobHoward posted:Let's talk about a couple interesting Intel ISAs which are not x86! You can even get clones with onboard flash memory and other modern features.
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# ? Jun 28, 2021 02:37 |
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BobHoward posted:There was lots of demand for small-ish UNIX workstations, and these RISC CPUs were a killer feature for that type of machine. What was it about UNIX workstations that made RISC CPUs particularly well-suited to them?
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# ? Jun 28, 2021 05:49 |
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Farmer Crack-rear end posted:What was it about UNIX workstations that made RISC CPUs particularly well-suited to them? Speed. Early RISC performance numbers made it clear that the most commonly used CISC UNIX workstation CPU family, Motorola's 680x0 series, was going to be left in the dust.
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# ? Jun 28, 2021 06:54 |
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BobHoward posted:It's not inevitable that all PCs will be using Arm CPUs in 5 or 10 years, but I do think we're in an inflection point where that could happen. It depends a great deal on Microsoft having the desire and competence to push it forwards. I mean, depends. PCs in the trad sense are a bit of a shrinking market and have been for a while now; below it we have phones, tablets and I guess Chromebooks and that's pretty much ARM land. Above that we have servers which care a whole lot less about ISAs and after years of talk ARM servers are actually beginning to become a thing in eg AWS. Microsoft matters when it comes to 'traditional desktop' but people are traditionally desktopping less.
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# ? Jun 28, 2021 14:01 |
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BobHoward posted:You even see people making the same mental mistakes. Back in the day, people used to scoff at the idea that x86 could take on the workstation and server markets. Recently, we've seen many similar opinions about Arm; people assume there's some intrinsic property which makes x86 faster. Apple's already exploiting the fact that it's easier to go wide with the ARM ISA. I get the impression that ARM's vector instructions are better thought out than the Intel equivalents. Is there a legitimate argument to be made that ARM CPUs are actually likely to overtake x86 in performance within a few years?
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# ? Jun 28, 2021 21:26 |
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ConanTheLibrarian posted:Apple's already exploiting the fact that it's easier to go wide with the ARM ISA. I get the impression that ARM's vector instructions are better thought out than the Intel equivalents. Is there a legitimate argument to be made that ARM CPUs are actually likely to overtake x86 in performance within a few years? Arguably, we're already there. https://browser.geekbench.com/processors/intel-core-i9-11900k https://browser.geekbench.com/macs/mac-mini-late-2020 https://support.apple.com/en-us/HT201897 Obviously these are just benchmarks and a lot of caveats apply but the Apple M1 running at 3.2GHz using 39W of power is extremely close to the top intel processor boosting to 5.3GHz using 125W of power. I imagine, if they wanted to, Apple could just boost the speed and power consumption of the M1 and be the fastest current processor.
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# ? Jun 29, 2021 15:57 |
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Farmer Crack-rear end posted:What was it about UNIX workstations that made RISC CPUs particularly well-suited to them? UNIX and RISC also went well together for more “social” reasons: The UNIX workstation rose to prominence with 68K but higher performance was going to require new architectures, as BonHoward said. The UNIX workstation had also mostly come out of work done at universities, particularly Berkeley and Stanford. (Remember that SUN was originally an acronym!) RISC was a Berkeley-Stanford thing just like most of the UNIX workstations so it was natural for industry partnerships to form, especially when it came to the workstation companies that were university spin-offs. The other reason that UNIX workstations went with RISC was because UNIX was super-portable by the standards of the day. Not only was most of the kernel in C, so was the rest of the OS and its toolchain. So you could add support for your new architecture to the assembler, then the linker, then the compiler, and have something working in no time—running existing code with existing test suites. And any code generation improvements have global benefit.
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# ? Jun 30, 2021 03:32 |
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Gwaihir posted:I wouldn't charge for it since it's surplus, other than just whatever it took to pack and ship. But, like, that would be a lot, lol Goony Trip report! Me and Cowman drove down from Atlanta to meet up with Gwaihir and picked up the IBMs! CommieGIR fucked around with this message at 15:16 on Jul 4, 2021 |
# ? Jul 4, 2021 15:13 |
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I can't wait to see what that sucker can do once it's not locked under core license restrictions!
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# ? Jul 4, 2021 17:06 |
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CommieGIR posted:Goony Trip report! Kudos on a great acquisition! I hope you do cool things with it.
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# ? Jul 4, 2021 17:29 |
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I’m really curious to hear about homelab projects too, I can never think of things I want to do yet want to get setups like RPi clusters for no reason
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# ? Jul 4, 2021 17:33 |
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priznat posted:I’m really curious to hear about homelab projects too, I can never think of things I want to do yet want to get setups like RPi clusters for no reason Of course, we also have an awesome homelab thread I started for that: https://forums.somethingawful.com/showthread.php?threadid=3945277
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# ? Jul 4, 2021 17:36 |
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CommieGIR posted:Of course, we also have an awesome homelab thread I started for that: https://forums.somethingawful.com/showthread.php?threadid=3945277 Very neat, bookmarked! Would be interesting to see more on what projects people are using em for too.
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# ? Jul 4, 2021 18:48 |
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The Power 770s are installed! Will be wiring them up tomorrow and doing initial testing.
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# ? Jul 4, 2021 20:01 |
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That's awesome! Can't wait to see more of it.
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# ? Jul 4, 2021 22:15 |
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Tried to power up the Power 770s but the HMC is toast so if I want to boot them I'll need another HMC or connect to them serially to boot
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# ? Jul 6, 2021 03:45 |
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Russia announces plans to push homegrown RISC-V designs into the government and education spaces by 2025. https://www.anandtech.com/show/16827/russia-to-build-riscv-processors-for-laptops-8core-2-ghz-12nm-2025
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# ? Jul 14, 2021 17:58 |
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mdxi posted:Russia announces plans to push homegrown RISC-V designs into the government and education spaces by 2025. It'll be interesting to see how they perform. I do wonder how RISC-V will perform in non-testbed scenarios. Still making slow, steady progress on selling my backlog of computers for the purpose of acquiring an eight core POWER9 machine here. People keep advocating for Fedora on ppc64le, but Ubuntu's my comfort zone - how much harder will I make my life if I go that route instead?
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# ? Jul 14, 2021 19:16 |
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Run NetBSD, OP.
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# ? Jul 14, 2021 19:42 |
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I put Ubuntu 18.04 on a Talos II Power9 a while back and it ran great. I don’t really care a lot about distros I just put server on without gui and have my set of scripts I run on it anyway though. I couldn’t tell you what the differences are between fedora or netbsd or ubuntu. It was just I already had a live usb stick with it!
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# ? Jul 14, 2021 22:41 |
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Hasturtium posted:It'll be interesting to see how they perform. I do wonder how RISC-V will perform in non-testbed scenarios. To be honest, I think almost any CPU these days is fast enough to run a bureaucracy (office work and the like). I mean, if it is *that* important to run homegrown CPUs you could probably do some extra work on the software side as well.
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# ? Jul 15, 2021 08:56 |
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You can run a small office on terminals connected to a single 16-bit minicomputer with only a few hundred kilowords of memory and a few megawords of secondary storage, and a large office with not significantly more, scaling pretty linearly.
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# ? Jul 15, 2021 09:29 |
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https://www.tomshardware.com/news/ascenium-reinvent-the-cpu Ascenium Wants to Reinvent the CPU - And Kill Instruction Sets Altogether It's not a Mill rebrand, but some of this sounds pretty nonsensical to me? quote:And with deep pipelines and the specialized hardware registers and stages which make up a modern CPU's processing, Ascenium estimates that around 50% of instructions are related to the movement of data through the pipeline - instructions and moves which take up both processing time and power budget. I get a kick out of showing more software oriented folks register renaming, but someone doing this since 2005 ought to have heard of it. But "data through the pipeline" isn't quite even that. Or it's a slightly different point on the Cell curve, you've got a zillion simple FPGA slices that can be configured a few ways based on workload. Anyway, ISA's are a thing of the past, good riddance, now throw your code into the magical parallelism machine.
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# ? Jul 15, 2021 16:22 |
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PDP-8 had a good ISA. eschaton fucked around with this message at 19:27 on Jul 16, 2021 |
# ? Jul 16, 2021 19:18 |
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Want to build your own? You can!
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# ? Jul 16, 2021 19:32 |
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There's still a bunch of botique ISAs running around in the microcontroller world, although cortex-m has been eating them one by one. The ones I've worked with directly: NXP Coldfire: not-quite-a-68k 32-bit micro that's similar to but not binary compatible with 68000. Mnemonics mostly the same but the opcodes changed, with a few additions and subtractions. Beefy enough to run uclinux in '99 then full-blown linux with mmu on coldfire v4 in 2000. Not a whole lot to say about the ISA since it was a slightly optimized variant on the extremely popular 68k. Dropped binary coded decimal support and tweaked a few other things. It's being phased out for Cortex-A/Cortex-M parts but they still sell them up to 266mhz. Microchip PIC: grandad's microprocessor Love them or hate them, they're absolutely everywhere. The earlier 8-bit parts were interesting to program for in anything but assembler given the c-hostile ISA. Single accumulator, N-banks of 256 8-bit registers that serve as ram. No access to the hardware stack so it's only usable for ISRs and of course your "software stack" is using the same registers you're trying to push. All registers have to be accessed directly, with a pair of hardware registers to do indirect addressing. Eventually the indirect addressing was extended to add post-increment. Before that you had to manually increment FSR to get the next byte of an array. I hated working with them. TI MSP430: seemingly operates on unicorn farts, not electricity Can run for literal years on a single coin-cell due to the hyper-optimized wake/sleep cycles. 16-bit von neumann with an enormous variety of peripherals, pinouts, operating frequencies and sram capacity. 16 registers, with PC/SP/SR and hardcoded-zero being the first 4 and addressed the same as the 12 following general purpose regs. Two dozen or so opcodes so not a lot of core complexity to deal with, until you've got more than 64k of addressable storage. Then things start to get weird, since it doesn't have virtual memory. If you needed a small amount of code over what was partitioned on your particular chip you could just copy it to a fixed (low) SRAM location and jump to it. If you needed more than that, you got to enjoy the wild word of overlays and trampolines. To call a function in high-flash you had to copy it to low SRAM then jump to it. The next function? Yup, copy that bank in and jump to the same address, now with new code. This was always a source of excitement when debugging. This is different than segmented processors like the 8086 in that it required a memory copy rather than just changing a bank register. AVR (Alf and Vegard's RISC processor): Basis of the arduino phenomenon and 3d printers everywhere. 8-bit harvard architecture with 32 registers. Probably the one i've worked the most on, entirely due to a quirk of timing that the UART perhiperal supported 9-bit serial when the other options needed to bit-bang without hardware support. Instruction set is fairly sane, mostly-general-purpose registers with a few special meanings. There's a few quirks to be aware of, such as flags only being affected by specific instructions and not always the ones you'd expect. Different opcodes for the different addressing domains, IO/register file/SRAM/EEPROM/flash. Flash is word-addressed so you can directly load from 128k. Since so much addressing is 16bit there's MOV.W instructions added later that set register pairs at once. A slight revamp/cleanup of the addressing modes was done for the "xmega" line but they're fundamentally the same. Supports every perhiperal under the sun, including USB (device). Also owned by microchip now. I'm probably forgetting some but this post is already way too long.
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# ? Jul 25, 2021 09:43 |
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Harik posted:TI MSP430: seemingly operates on unicorn farts, not electricity I designed something with a MSP430, it had a capacitive sensor. The factory reported that they would put the device into the test jig, turn the power on, and the software would report PASS before they got anywhere near the capacitive sensor. The eventual root cause was the UART lines TX/RX were providing enough juice for the chip to boot and limp through the cap sense procedure. When it got a real power supply the numbers got big enough that the SW recorded the PASS because it saw enough swing on the pads. The ISA was understandably limited. I had a few bit-shifts, but the ISA didn't have anything variable so they just had a function that was 10 of them they'd jump into at the appropriate point. Switch statements got boiled down to a jump table. An intern wrote something like (I%40) and saw it executing orders of magnitude slower because it was spending the vast majority of time doing that division.
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# ? Jul 25, 2021 13:16 |
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JawnV6 posted:I designed something with a MSP430, it had a capacitive sensor. IIRC ARM's first CPU had this happen where they couldn't turn it off because it would get enough current from the I/O pins to stay on
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# ? Jul 25, 2021 16:10 |
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JawnV6 posted:I designed something with a MSP430, it had a capacitive sensor. Also while its not technically limited to MSP430s it basically is: FRAM is magic.
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# ? Jul 25, 2021 16:37 |
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I just built out a little RISC-V workstation!
It came right up from the SiFive SD card images, as one should expect. In the next year or so, I should be able to switch it to either Fedora or FreeBSD.
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# ? Jul 26, 2021 01:42 |
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eschaton posted:I just built out a little RISC-V workstation! Cool! How’s performance of the SiFive, and what are your initial impressions?
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# ? Jul 26, 2021 02:06 |
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eschaton posted:I just built out a little RISC-V workstation! Gotta post some photos!
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# ? Jul 26, 2021 02:21 |
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It looks like a Haiku kernel hacker got the OS running in a barebones fashion on a SiFive HiFive Unmatched in about two weeks. As a BeOS head once upon a time, it makes me happy to see it. edit: Also, am I crazy or does the Unmatched not have a front panel USB connector? Hasturtium fucked around with this message at 12:56 on Jul 30, 2021 |
# ? Jul 30, 2021 02:51 |
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You’re not crazy, it does not have either a front panel or USB header.
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# ? Jul 30, 2021 10:30 |
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Does anybody have recs for computer architecture, ideally for micros but possibly for other stuff (hopefully not x86) textbooks that are good and a useful read? Ideally more focused on the implications of the architecture on code that runs on the device. Have some coworkers that would get a lot out of one. Unfortunately I picked up what I know out of practical experience and accumulated debugging and so on so I don’t really know what a good one would be.
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# ? Aug 3, 2021 20:30 |
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Phobeste posted:Does anybody have recs for computer architecture, ideally for micros but possibly for other stuff (hopefully not x86) textbooks that are good and a useful read? Ideally more focused on the implications of the architecture on code that runs on the device. Have some coworkers that would get a lot out of one. Unfortunately I picked up what I know out of practical experience and accumulated debugging and so on so I don’t really know what a good one would be. When I was in school "Computer Architecture - A Quantitative Approach" by Hennessy and Patterson was the gold standard and it looks like there have been several new editions of it since then. It's mostly more general than specific architectures but they have updated it with multicore and even GPU stuff. The newest one (6th edition) does have RISC V examples.
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# ? Aug 3, 2021 20:50 |
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You may get more out of the Patterson and Hennessy book first, thats how a university curriculum would normally work. https://www.amazon.com/Computer-Organization-Design-RISC-V-Architecture/dp/0128203315/
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# ? Aug 3, 2021 21:16 |
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Awesome, thank you both!
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# ? Aug 3, 2021 22:32 |
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# ? May 28, 2024 16:14 |
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In addition to H&P, “Computer Engineering: A DEC View of Hardware Systems Design” is also worth a read for some historical perspective.
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# ? Aug 7, 2021 08:29 |