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Thank you for the responses, all. Some leads for me to investigate and follow-up on.
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# ? Aug 13, 2023 01:58 |
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# ? May 30, 2024 10:42 |
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priznat posted:Sometimes I wish there was a post silicon validation thread but mostly we’d probably just bitch about using tools and processes that were put in place before we were even out of college *Rocko's head popped out the trash can.* They use it because nobody knows how to validate, they can't even get information on what to validate, but there is this thing from 2001 that the previous project used (and so forth) so that's what we'll use. It's black box testing simply because nobody knows what is in the box. For all anybody knows, it's a filled with a condemned Roman prisoner, a snake, and a dog. gently caress me, I did not realize this is the thread where Intel people get complain. Where have y'all been? I got sucked in during 2008 and have been unable to escape. Rocko Bonaparte fucked around with this message at 16:04 on Aug 13, 2023 |
# ? Aug 13, 2023 09:49 |
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I wonder how many "please send help" messages can be found in circuit designs or microcode.
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# ? Aug 13, 2023 18:30 |
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So apparently the tradeoff for the 14700K's performance bump is an additional 30W of juice: https://www.guru3d.com/news-story/core-i7-14700k-raptor-lake-refresh-cpu-faster-but-uses-30w-more.html
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# ? Aug 13, 2023 19:43 |
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BIG HEADLINE posted:So apparently the tradeoff for the 14700K's performance bump is an additional 30W of juice: https://www.guru3d.com/news-story/core-i7-14700k-raptor-lake-refresh-cpu-faster-but-uses-30w-more.html Will I need to turn off my dryer to run that?
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# ? Aug 13, 2023 19:45 |
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No need, it will turn off automatically when the circuit trips.
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# ? Aug 13, 2023 20:07 |
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I bet the 14900K will require a 3-phase power hookup to your house, just to power the cooling system.
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# ? Aug 13, 2023 20:30 |
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BIG HEADLINE posted:So apparently the tradeoff for the 14700K's performance bump is an additional 30W of juice: https://www.guru3d.com/news-story/core-i7-14700k-raptor-lake-refresh-cpu-faster-but-uses-30w-more.html So basically the amount of power to push the clocks up a smidge higher and power another quad-core efficiency block pushed beyond its point of diminishing returns. This isn’t as bad as the 11900KF devouring twice the power of the 11900F for single digit percentage performance gains, but it ain’t great.
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# ? Aug 13, 2023 21:03 |
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Indiana_Krom posted:I bet the 14900K will require a 3-phase power hookup to your house, just to power the cooling system. Intel i9 14900K + mobo + single phase to 3 phase VFD combo still comes with the lovely aluminum box fan.
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# ? Aug 13, 2023 22:01 |
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I would say "woo, back to Prescott!" but Prescott was high across the board. Yorkdale all over again?
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# ? Aug 13, 2023 22:28 |
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Wasnt prescott like 95 or 105w? But thats 1 core not 20
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# ? Aug 13, 2023 22:34 |
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Wild EEPROM posted:Wasnt prescott like 95 or 105w? Single core Prescott went to 115W for the last highest-clocked models. Hyperthreading probably increased that to an effective 130W+ under full sustained load. Pentium Ds went to 125W; the Extreme Editions with 1066 MHz frontside bus speeds and hyperthreading reached to 165W effectively for performance that would get punked by a midrange Core 2 Duo for nearly any job you’d think to put it to.
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# ? Aug 13, 2023 23:21 |
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BIG HEADLINE posted:So apparently the tradeoff for the 14700K's performance bump is an additional 30W of juice: https://www.guru3d.com/news-story/core-i7-14700k-raptor-lake-refresh-cpu-faster-but-uses-30w-more.html It's not called "Raptor Lake Refresh" for nothing.
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# ? Aug 14, 2023 00:59 |
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what happened to the rumors about bumps in core count? the latest news seems to be that it's exactly the same as previous gen
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# ? Aug 14, 2023 01:05 |
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shrike82 posted:what happened to the rumors about bumps in core count? Only the 14700K(F) is getting a bump. Turns out the rumor about the 14600K getting two extra p-cores came from RedGamingTech, which predictably turned out to be bogus.
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# ? Aug 14, 2023 01:23 |
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I see more e-cores and I just instantly don't give a poo poo. Let me know when they up the p-core count
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# ? Aug 14, 2023 01:24 |
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does upping e-core count do much for desktop usage?
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# ? Aug 14, 2023 01:25 |
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WhyteRyce posted:I once went on a recruiting trip with my boss to a UC. The hiring guidelines were 3.0 or higher. My boss was livid that we were getting all these 3.2 and 3.3 people and complaining loudly to the advisor we were working with about why the A students weren't lining up. I didn't know how to tell him top tier candidates weren't going to line up to do post-silicon chipset validation in a not exciting city for not FAANG pay Just lmao at giving a poo poo that much about GPA when hiring, especially the difference between 3.3 and 4.0 — I bet hiring there was hosed
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# ? Aug 14, 2023 02:12 |
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shrike82 posted:does upping e-core count do much for desktop usage? I'm sure it does something when all you have are E-cores. I'll let you know when my N300 box comes in.
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# ? Aug 14, 2023 02:13 |
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shrike82 posted:does upping e-core count do much for desktop usage? Generally, no. A few things yes (code compile, encoding). But like, the 13400F had pretty good desktop performance and the thing holding it back wasn't that it had 4 E cores instead of the 13600K's 8. It was the lower boost and having less L2/L3. TBQH for a general desktop / gaming user I wouldn't be excited for more P or E cores. 6P seems to be plenty for current and near-future (ie next several years) games. E cores are a nice value-add, not a decision factor. I would get excited for C.R.E.A.M in the midrange parts. Cache rules everything around me. Klyith fucked around with this message at 03:16 on Aug 14, 2023 |
# ? Aug 14, 2023 02:37 |
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I've been gaming on a 13600KF with a 4090 and feel like there's room for improvement on stuff like load times. Might switch to the 8800X3D during the next upgrade cycle
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# ? Aug 14, 2023 02:57 |
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shrike82 posted:I've been gaming on a 13600KF with a 4090 and feel like there's room for improvement on stuff like load times. For load times specifically I wouldn't be surprised if you're held up by something else entirely like disk I/O latency or even RAM latency. It's not like when you're in game and working with a main loop that'll have a hot working set that hopefully fits in big cache. At the same time, I doubt devs give a poo poo about optimizing load times unless it's miserable. Even then, look at Rockstar and GTA5 on PC.
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# ? Aug 14, 2023 03:02 |
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Could be, I was under the impression intel chips were less sensitive to ram timings
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# ? Aug 14, 2023 03:04 |
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I’m trying to figure out why the xeon platinum 8156 exists
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# ? Aug 14, 2023 03:24 |
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Hasturtium posted:Single core Prescott went to 115W for the last highest-clocked models. Hyperthreading probably increased that to an effective 130W+ under full sustained load. Pentium Ds went to 125W; the Extreme Editions with 1066 MHz frontside bus speeds and hyperthreading reached to 165W effectively for performance that would get punked by a midrange Core 2 Duo for nearly any job you’d think to put it to. Prescott was the first CPU I worked on when I joined Intel. It was pretty rad going from that/Smithfield to the Merom/Sandybridge core.
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# ? Aug 14, 2023 03:27 |
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Wild EEPROM posted:I’m trying to figure out why the xeon platinum 8156 exists Oh, that's a part specifically made to run software that is licensed per core in the physical host. So paying more money to get a quad core server processor vs a conventional 24+ core processor may save you hundreds of thousands of dollars in software licensing costs.
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# ? Aug 14, 2023 03:28 |
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Twerk from Home posted:Oh, that's a part specifically made to run software that is licensed per core in the physical host. Yeah, it’s chasing the same niche IBM did with SMT8 Power9, which for all intents and purposes was effectively two SMT4 Power9 chips in a trench coat.
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# ? Aug 14, 2023 03:39 |
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Looking at the various lists, it still doesn’t seem to make sense even for licensing; platinum 8256: 4c8t, 3.8-3.9ghz, 16.5 mb L3 cache, 8 sockets, 105w tdp, $7007 versus: gold 5222: 4c8t, 3.8-3.9ghz, 16.5 mb L3 cache, 4 sockets, 105w tdp, $1221 So you lose the ability to do 8 sockets but you save $5786
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# ? Aug 14, 2023 03:43 |
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Wild EEPROM posted:Looking at the various lists, it still doesn’t seem to make sense even for licensing; yeah but there are some customers who want 8-socket but low count per socket, for just maximum IO/memory fanout. and intel takes them to the cleaners separately for a higher fee. AMD does the same thing with -P vs normal. -P is a chunk cheaper (usually very good value) if you give up 2-socket. that was always the reason around suffix bloat on the old skylake-sp/cooper/icelake skus. gosh this one is the telcom sku and it has the exact weird lifetime/temp-rating warranty they want, that one is the memory optimized one with 100% of the memory controller turned on for people who want tons of ram, etc. intel likes to pick each pocket individually. and "oh you want 8 sockets worth?" has always been a pocket that gets picked individually too. To be fair the extra UPI link isn't free etc. You need to yield both links on the die for that to work etc. Same for yielding the second memory controller. But it's a case of being priced to what the market for it will bear for sure. platinum also gets more features turned on, like I think all platinum can use the optane pdimms (lol)? Paul MaudDib fucked around with this message at 05:22 on Aug 14, 2023 |
# ? Aug 14, 2023 05:13 |
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Wild EEPROM posted:Looking at the various lists, it still doesn’t seem to make sense even for licensing; A spec which seems possibly important in both of these is 3.8 GHz base, 3.9 GHz max turbo. Most of the other low core count SKUs have a moderate spread between base and max, with a max value significantly higher than 3.9. On these two, in practice, I would not be surprised if frequency is almost locked at 3.9, falling back to 3.8 only for power virus loads. Some specialized applications need deterministic performance - or as deterministic as you can make it, given that caches are things which exist. These could be designed for such a niche. Charging many times more for the same thing but with fewer fuse bits blown is Intel SOP. They soak the hell out of people who build big iron. Here's another example from Cascade Lake: https://ark.intel.com/content/www/us/en/ark/compare.html?productIds=199350,192472 $10K difference to enable the third QPI link for 8S, and allow the memory controller to address up to 4.5TB RAM instead of 1TB.
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# ? Aug 14, 2023 05:20 |
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Rocko Bonaparte posted:*Rocko's head popped out the trash can.* On the flip side, there was always some ahole popping up every 2-3 years bucking for a promotion who would try to kick start some initiative to remove "low value" tests defined as tests that haven’t found any bugs on the last project and I have to explain post-silicon chipset validators aren't mighty hunters scouring the jungle for some prized beast and bringing it down with well aimed spears but a bunch of lazy rear end fishermen who throw out some nets and hope something gets caught. Generally that didn't work but if I argue that it would impact the indicators, removing all the easy passing tests and having only the difficult stuff remaining then some manager would quickly shut that poo poo down That's not to say you shouldn't ever remove stupid poo poo from your test plan, but if I can explain the technical reason for a test and that no other content provides the same coverage just leave it. It helps green line go up and green line is good! And this ultimately is a test plan change and should be handled as part of the test plan review process. But some managers and technical leaders always tried to side step that process because some designer or architect would tell them to gently caress off. I think a lot of bad poo poo happened in my old group because technical decisions were mandated by managers outside the regular technical chain. I was once told by a manager to not try and run some tests until B-step because we can't expect it to work on A-step and I couldn't get him to see the problem with that logic Sorry for the stream of nonsensical rants but I have strong feelings tehinternet posted:Just lmao at giving a poo poo that much about GPA when hiring, especially the difference between 3.3 and 4.0 — I bet hiring there was hosed It was a really odd back and forth between "he didn't make the GPA cutoff I don't care how well his interviews went" and "ok your interview rating was don't hire but the req is closing so as long as you don't see any serious red flags we'll still take him" WhyteRyce fucked around with this message at 07:08 on Aug 14, 2023 |
# ? Aug 14, 2023 05:24 |
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shrike82 posted:does upping e-core count do much for desktop usage? It helps win the barchart race, which is basically all the brands care about because its all consumers care about. The 7950X3D is another great example of the brands designing a CPU specifically to win on charts.
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# ? Aug 14, 2023 06:51 |
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WhyteRyce posted:I was once told by a manager to not try and run some tests until B-step because we can't expect it to work on A-step and I couldn't get him to see the problem with that logic No, it's entirely understandable why. JFC. You'd expect management at a semiconductor company to at least understand that finding bugs earlier in the process rather than later always saves money.
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# ? Aug 14, 2023 09:50 |
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Hasturtium posted:So basically the amount of power to push the clocks up a smidge higher and power another quad-core efficiency block pushed beyond its point of diminishing returns. This isn’t as bad as the 11900KF devouring twice the power of the 11900F for single digit percentage performance gains, but it ain’t great. i find it pretty funny and depressing my phone plays video at 2W which is still 6W lower than the idling class D amp and DAC which is wirelessly connected to, much less my PC completely idling at 60w
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# ? Aug 14, 2023 11:02 |
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BobHoward posted:No, it's entirely understandable why. JFC. You'd expect management at a semiconductor company to at least understand that finding bugs earlier in the process rather than later always saves money. But the schedule!!!?!?
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# ? Aug 14, 2023 16:06 |
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BobHoward posted:No, it's entirely understandable why. JFC. You'd expect management at a semiconductor company to at least understand that finding bugs earlier in the process rather than later always saves money. At some point people lose sight of the overall goal of the company (hey, ship this out on time and at a high quality) in favor of their direct measurables and indicators (hey I want our graph to be green not red to make us look better, I don't want to be the one holding up PRQ) Same thing with temperature/voltage/process shmoo testing. "Hey why do you have so many tests targeted to run at cold temperature those lines never pass" WhyteRyce fucked around with this message at 16:13 on Aug 14, 2023 |
# ? Aug 14, 2023 16:11 |
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I remember being told by one team to add a flag to disable post-test checking on a tool I wrote because the failures were blocking them and they wanted the choice to ignore them. Fair enough, just add --disable-checking-and-i-understand-the-risks, accept the output about the checks being off everywhere and know that I told the person consuming your reports exactly what to look for when you tell them you finished. They tried to run literally everything with the checking off and got caught.
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# ? Aug 14, 2023 16:43 |
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one interface owner once set the dropped packet threshold to 100% to get his tests running. I forget when they finally changed it when I started someone told me to remove the checker that reads back PCIe AERs because that always failed on him doing power management states
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# ? Aug 14, 2023 17:14 |
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WhyteRyce posted:At some point people lose sight of the overall goal of the company (hey, ship this out on time and at a high quality) in favor of their direct measurables and indicators (hey I want our graph to be green not red to make us look better, I don't want to be the one holding up PRQ) The 14nm process was such a disaster for this same reason. Process Technology Development threw it over the wall to high volume manufacturing in such an unhealthy state with garbage yields. It took a very long time to get 14nm yields to the same yields that 22nm STARTED at. So, yeah, 10nm was delayed and delayed but at least they weren't trying to fix it in prod like 14nm
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# ? Aug 14, 2023 17:25 |
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# ? May 30, 2024 10:42 |
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WhyteRyce posted:one interface owner once set the dropped packet threshold to 100% to get his tests running. I forget when they finally changed it PCIe can be a little bit annoying because it can go either first time link up or oops you got a bunch of recoveries at link up as it tries different equalizations but now you're ok and it can vary wildly between channels/interfaces and at different temperatures. We always have issues with the CScripts until we talk to our Intel contacts to try to get a feel on what other manufacturers are seeing on them with rate of recoveries or extra eq steps required. 9 times out of 10 we get "oh yeah everyone sees that just ignore that rate of errors" lol Sadly I have become "the CScripts guy" so I have to go through the process every generation to figure out all the little gotchas.
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# ? Aug 14, 2023 17:32 |