code:

//----------------------------------------------------------------------
// Suppose your ADC is providing a signed 2's complement 16 bit value
// ranging from -32768 to 32767.  You decide you don't care about the bottom
// eight bits because they're noise and just want to drop them
//
// DropEightLowBits(-32768) => -128    0x8000 => 0x80
// DropEightLowBits(-30875) => -121    0x8765 => 0x87
// DropEightLowBits(32767)  =>  127    0x7FFF => 0x7F
// DropEightLowBits(0)      =>    0    0x0000 => 0x00
//----------------------------------------------------------------------
int8_t DropEightLowBits(int16_t input)
{
    // You could drop them by dividing
    const int16_t output_divide = input / 256;

    // You could drop them with an arithmetic shift
    const int16_t output_shift = input >> 8;

    // These will compute the same thing.  Pick whichever one you think is more clear
    assert(output_divide == output_shift);

    // And with an optimizing compiler
    // they will make the same assembly
    //
    // On x86, they will use a SAR instruction (shift, arithmatic right) 
    // [contrast to  SHR for a logical shift where 0's fill the vacated space or ROR 
    // where the shifted off bits fill the spaces]
    //
    // On ARM, they would use a ASR instruction (vs LSR for logical and ROR for rotate)

    // The output will always be expressible in a int8_t at this point since we only have 8 bits
    // left.
    assert(output_shift >= -128);
    assert(output_shift <= 127);
    return (int8_t)output_shift;
}

//----------------------------------------------------------------------
// Suppose you are getting the same input, but you want to keep the numbers on
// the same scale, just zero out the bottom bits (and presumably not transmit/store them
// or something).  
//
// ZeroEightLowBits(-32768) => -32768      0x8000 => 0x8000
// ZeroEightLowBits(-30875) => -30976      0x8765 => 0x8700
// ZeroEightLowBits(32767)  =>  32512      0x7FFF => 0x7F00
// ZeroEightLowBits(0)      =>      0      0x0000 => 0x0000
//----------------------------------------------------------------------
int16_t ZeroEightLowBits(int16_t input)
{
    // Shift
    const int16_t step_1= input >> 8;

    // Then shift back (filling the bits on the right with 0's)
    const int16_t output_shift = step_1 << 8;

    // Or just mask
    const int16_t output_mask = input & 0xFF00

   return output_mask;
}

//----------------------------------------------------------------------
// Suppose your ADC is providing a signed 2's complement 12 bit value
// ranging from -2048 to 2047, but you get it embedded in a 16-bit value 
// [I guess this could happen with a 12-bit SPI transaction or something].  
// 
// You want the upper 10 bits, but you also want them sign 
// extended so the negative ones are negative when viewed as int16_t
//
// 12-bit -2048 (0x800) stuck in the bottom of a uint16_t:
//   DoAComplicatedThing(0x0800) => 0xFE00 [-512]
//
// 12-bit -2166 (0x876) stuck in the bottom of a uint16_t:
//   DoAComplicatedThing(0x0876) => 0xFE1D [-483]
//
// 12-bit +2047 (0x7FF) stuck in the bottom of a uint16_t:
//   DoAComplicatedThing(0x07FF) => 0x01FF [ 511]
//----------------------------------------------------------------------
int16_t DoAComplicatedThing(uint16_t input)
{
    // Left shift so the leftmost bit you want to keep is all the way at the top
    // Need the data type to be signed to get an arithmetic right shift.  Left 
    // shift is the same either way (fills with 0's)
    const int16_t step_1 = (int16_t)(input << 4);
	
    // Now shift so the rightmost bit you want to keep is at the bottom.  
    // The sign extension will fill the upper bits
    const int16_t output = step_1 >> 6;
	
    return output;
}