|
I was wondering how the hell they planned on cooling the drat things.. Also  at 220W.AMD Vishera: for those cold winter nights.
|
#
?
Oct 10, 2013 07:02
|
|
|
|
| # ? Jun 8, 2024 09:37 |
|
|
Endymion FRS MK1 posted:Huh. Well now its not a terrible buy now. Just a slightly worse one. I'd be tempted if my 3570K + NH-D14 combo wasn't already cheaper I guess. I wouldn't be. 3570K + NH-D14 is about as good as it gets. FX-9590 is simply as hot as it gets.
|
|
#
?
Oct 10, 2013 09:01
|
|
|
Endymion FRS MK1 posted:Huh. Well now its not a terrible buy now. Just a slightly worse one. I'd be tempted if my 3570K + NH-D14 combo wasn't already cheaper I guess. http://www.cpubenchmark.net/high_end_cpus.html Yeah it looks like it's at least sort of competitive with a similarly priced i7 offerings. Probably a lot more power hungry which still gives Intel an edge, but at least it's not a complete joke now. I guess.
|
|
#
?
Oct 10, 2013 11:30
|
|
|
Detroit Q. Spider posted:http://www.cpubenchmark.net/high_end_cpus.html
|
|
#
?
Oct 10, 2013 18:53
|
|
|
Instead of buying a new cooking range it might be cheaper to buy these things
|
|
#
?
Oct 10, 2013 19:29
|
|
|
Why is AMD even trying to compete on performance? All it does is generate bad press. I am still incredibly happy with my $300 trinity A8 laptop. I think the first game I won't be able to play will be the new X game.
|
|
#
?
Oct 10, 2013 19:32
|
|
|
keyvin posted:Why is AMD even trying to compete on performance? I think it's because they're behind on performance per watt, single-threaded performance per dollar, and rapidly losing ground in the extreme low end. $249 Chromebooks with Haswell processors are showing up, as well as a new Atom that looks extremely competitive and dirt cheap. What is AMD supposed to compete on if Intel builds a complete chip range including options under $100?
|
|
#
?
Oct 10, 2013 19:48
|
|
|
Imagine being one of those people who bought one when they first came out. Not only did they kick themselves in the nuts, now AMD has joined in too.
|
|
#
?
Oct 10, 2013 22:33
|
|
|
This is a thing with slides on Kaveri's paper launch. Two A10s and one A8 in February. Various reports of just how much performance (IPC, HPC, whatever) improves are still...all over the place.
Sidesaddle Cavalry fucked around with this message at 11:39 on Oct 28, 2013 |
|
#
?
Oct 28, 2013 11:33
|
|
|
Sidesaddle Cavalry posted:This is a thing with slides on Kaveri's paper launch. Two A10s and one A8 in February. Various reports of just how much performance (IPC, HPC, whatever) improves are still...all over the place. "New audio coprocessor" That's gotta be TroutAudio.
|
|
#
?
Oct 28, 2013 11:49
|
|
|
karoshi posted:"New audio coprocessor" That's gotta be TroutAudio. I dunno, sounds a bit fishy to me.
|
|
#
?
Oct 28, 2013 13:46
|
|
|
Fish puns make me ichthy.
|
|
#
?
Oct 28, 2013 20:49
|
|
|
Have you considered consulting a sturgeon?
|
|
#
?
Oct 28, 2013 22:34
|
|
|
Ugh, are we really doing puns in this thread? They're always so overwrought, people fumble and flounder for anything that could possibly fit. This is for serious AMD discussion.
|
|
#
?
Oct 28, 2013 23:42
|
|
|
No need to be a snapper. Have fun, be an in-grouper.
|
|
#
?
Oct 28, 2013 23:46
|
|
|
Factory Factory posted:No need to be a snapper. Have fun, be an in-grouper. I guess I just have a different school of thought from the majority here.
|
|
#
?
Oct 28, 2013 23:47
|
|
|
Some people just want to swim against the flow I guess
|
|
#
?
Oct 28, 2013 23:59
|
|
|
Take note AMD employees who skim SA (yes, we know you're hooked on F^2's advice), you know your processors are on the rocks when all we can do is make fish puns. Your top bass should be worried.
|
|
#
?
Oct 29, 2013 00:01
|
|
|
You're just angling for an AMD lurker to speak up aren't you? I'd rather be a fly on the wall. Stop trolling.
|
|
#
?
Oct 29, 2013 00:04
|
|
|
Mahi mahi, the quality of this thread has taken an unexpected dive. I hope this codforsaken mess doesn't salmon the attention of a moderator. I hear they can dunk posts into the deepest chambers of the forums.
|
|
#
?
Oct 29, 2013 01:54
|
|
|
Agreed posted:Ugh, are we really doing puns in this thread? They're always so overwrought, people fumble and flounder for anything that could possibly fit. This is for serious AMD discussion. Look at what you've done! (Inadvertently).
|
|
#
?
Oct 29, 2013 11:23
|
|
|
Agreed posted:Ugh, are we really doing puns in this thread? They're always so overwrought, people fumble and flounder for anything that could possibly fit. This is for serious AMD discussion. 
|
|
#
?
Oct 29, 2013 16:12
|
|
|
Sidesaddle Cavalry posted:Mahi mahi, the quality of this thread has taken an unexpected dive. I hope this codforsaken mess doesn't salmon the attention of a moderator. I hear they can dunk posts into the deepest chambers of the forums. It's OK, it brought this back up from the depths of the 2nd and 3rd pages.
|
|
#
?
Oct 30, 2013 00:12
|
|
|
AMD released some info on Kaveri today http://www.anandtech.com/show/7507/amd-kaveri-apu-launch-details-desktop-january-14th , I'm disappointed to see they are sticking with their single floating point unit per module setup. Maybe they're hoping that any floating point heavy task will be either not threaded at all or really heavily threaded so it can be offloaded to the GPU side of things. HSA still sounds like it could be interesting, but it doesn't look like this announcement gives any information that wasn't already out there besides what the hardware it will have to work with.
|
|
#
?
Nov 13, 2013 08:19
|
|
|
Considering most graphics cards these days use GDDR5, I am wondering about any performance drawbacks from using DDR3 for the gpu?
|
|
#
?
Nov 13, 2013 13:32
|
|
|
Cowwan posted:Maybe they're hoping that any floating point heavy task will be either not threaded at all or really heavily threaded so it can be offloaded to the GPU side of things. Actually threading isn't the limit of parallelism in FPUs. It's far older tech than multi-threading to pass multiple numbers in a single instruction - it's called vector processing, and it's been part of x86 since Intel's SSE on the Pentium III and part of computing for far longer than that. The idea is that if you have, say, four 32-bit floats and you need to do the same operation on all of them, you cram them together and send them as a 128-bit data to a SIMD instruction (single input, multiple data). AMD's CPUs aren't hurting for parallelism. It's just that Intel uses double the FP hardware per core, some could say inefficiently. Both AMD and Intel FPUs can run up to 256-bit vector operations. However, this requires using the AVX2 instruction set. If AVX2 is not used, then the best they operate is as 128-bit units. In an Intel CPU, half the instruction and execution pathway in the FPU is dormant without AVX2 - idle silicon. With AMD, the half the FPU gets symmetrically multithreaded and you can get double the 128-bit paths. So for 128-bit vector floats, which is the most most people can/will use today, a 4-core Intel chip has 4 FPU paths and an 8-core AMD chip has 8. It's just that supporting AVX2 will double Haswell's FP throughput but leave the AMD chip's largely unchanged, because the AMD chip isn't using any more or any less of its silicon.
|
|
#
?
Nov 13, 2013 14:57
|
|
|
system protocol posted:Considering most graphics cards these days use GDDR5, I am wondering about any performance drawbacks from using DDR3 for the gpu? Even with Trinity/Richland GPU performance would pretty much scale perfectly with DDR3 clocks, albeit it's not like it would perhaps scale with GDDR5 completely. But yes, it's a problem, hence why the Iris Pro which is Intel's top integrated GPU has a 128MB of Edram at 50gb/sec.
|
|
#
?
Nov 13, 2013 16:30
|
|
|
TechReport has a bit of gab about AMD's CPU roadmap. The big deal is that no FX CPU based on the new and imminent Steamroller core is scheduled for 2014. Looks like the first big consequence of AMD de-emphasizing the performance desktop space is with us. Not super surprising if you consider that FX CPUs don't have any IGPs for the HSA features to make use of. That was an initialism-heavy sentence.
|
|
#
?
Nov 18, 2013 02:49
|
|
|
Factory Factory posted:Actually threading isn't the limit of parallelism in FPUs. It's far older tech than multi-threading to pass multiple numbers in a single instruction - it's called vector processing, and it's been part of x86 since Intel's SSE on the Pentium III and part of computing for far longer than that. if you look at the perf advantage in GPU versus CPU for scientific compute applications, a lot of the time it scales linearly with bandwidth. graphics often performs similarly. as Intel's fabs get better and their ability to slap down huge amounts of eDRAM improves, it's going to be bad for AMD. also, it sounds like HSA for discrete GPU is dead. can't say I'm shocked, that was never a good value proposition for anyone (cache coherence over PCIe... no).
|
|
#
?
Nov 18, 2013 05:12
|
|
|
Professor Science posted:actually preceded by MMX and 3DNow, but that's neither here nor there... Dang, you're right. I should've looked it up to double check instead of just looking for confirmation of my bad memory.
|
|
#
?
Nov 18, 2013 05:25
|
|
|
Professor Science posted:if you look at the perf advantage in GPU versus CPU for scientific compute applications, a lot of the time it scales linearly with bandwidth. graphics often performs similarly. as Intel's fabs get better and their ability to slap down huge amounts of eDRAM improves, it's going to be bad for AMD. In either case (especially the former), these problems can also require a lot of memory -- so much so that I'm not convinced you will be able to work on reasonable problems with the amount of storage you can build with even an amazing eDRAM process. Maybe your eDRAM is another layer of the cache, but that doesn't help a lot for many bandwidth-bound applications. Look for 3D/2.5D stacking to be the general method of addressing the bandwidth limits and power issues of GDDR. quote:also, it sounds like HSA for discrete GPU is dead. can't say I'm shocked, that was never a good value proposition for anyone (cache coherence over PCIe... no).
|
|
#
?
Nov 18, 2013 09:02
|
|
Failed Sega Accessory Ahoy!
|
Factory Factory posted:TechReport has a bit of gab about AMD's CPU roadmap. The big deal is that no FX CPU based on the new and imminent Steamroller core is scheduled for 2014. Looks like the first big consequence of AMD de-emphasizing the performance desktop space is with us. I was hoping the Athlon line would continue on in Steamroller sans the GPU, possibly providing comparable performance to the previous generation FX chips. (for about half the price) Lafarg fucked around with this message at 12:05 on Nov 19, 2013 |
|
#
?
Nov 19, 2013 10:50
|
|
|
Well, at least the new Warsaw server line will be staying with 12 or 16 pure Piledriver threads, none of that pesky on-die graphics nonsense there. 
|
|
#
?
Nov 19, 2013 13:12
|
|
|
I wish AMD would embrace the low end more than they have. I would love to have something crazy like a 32 core 1-1.5ghz proc for a virtualization lab or for VDI.
|
|
#
?
Nov 20, 2013 00:28
|
|
|
Holy poo poo Menacer is still alive and hasn't been crushed under the weight of academia!
|
|
#
?
Nov 20, 2013 00:40
|
|
|
adorai posted:I wish AMD would embrace the low end more than they have. I would love to have something crazy like a 32 core 1-1.5ghz proc for a virtualization lab or for VDI. Microservers are going in that direction. They aren't 32 core single chips, but they are 4-8 cores in 10-30W of dissipation, packed into board area not unlike the inside of a 2.5" SSD.
|
|
#
?
Nov 20, 2013 01:01
|
|
|
|
|
#
?
Dec 18, 2013 18:49
|
|
|
Hey, looks like AnandTech's AMD desk finally got something useful: a Kaveri APU preview. The biggest thing is that it's fully HSA-enabled on Windows 8.1, complete with unified memory. All it needs are apps, and the GPU can be leveraged more easily than with an OpenCL codepath or something? I guess. They demo'd two builds of LibreOffice Calc doing spreadsheet stuff with stocks, and the difference between HSA and standard x86 was 0.12 seconds vs. 0.99, a solid boost. I imagine the big deal here is just plugging into the HSA stack and letting the scheduler do the job rather than having to write up an entire OpenCL workload, but honestly I have no Goddamn clue. On the x86 side, AMD is saying that we'll be getting power consumption improvements coupled with a 20% IPC boost. Turbo is either being reduced or the turbo range is widening, though - more to come on that. On the GPU side, the IGP goes up to 512 GCN cores @ 720 MHz at 95W (A10-7850K). Estimating by shader-Hertz, that puts the performance target just under an R7-250, which ain't too shabby for integrated graphics. Also has all that GCN 1.1 ooey-gooey like TrueAudio and Mantle. Factory Factory fucked around with this message at 02:39 on Jan 7, 2014 |
|
#
?
Jan 7, 2014 02:36
|
|
|
Factory Factory posted:I imagine the big deal here is just plugging into the HSA stack and letting the scheduler do the job rather than having to write up an entire OpenCL workload, but honestly I have no Goddamn clue.
|
|
#
?
Jan 7, 2014 03:22
|
|
|
|
| # ? Jun 8, 2024 09:37 |
|
|
That... would be a significant disappointment compared to how they're selling this. The whole subtext behind HSA and HUMA was that GPGPU programming would become as easy as sufficiently threading your workload. How does this make OpenCL programming any easier?
|
|
#
?
Jan 7, 2014 03:33
|
|