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wolrah posted:tl;dr the Pi's SoC has a built in hardware watchdog, which is basically a configurable timer that can reset the CPU. Once enabled the timer starts counting down and the software has to send it a "heartbeat" every X seconds before the timer reaches zero to prevent a reset. If the system has crashed the heartbeat doesn't happen and the timer expires, triggering a hardware reset that hopefully brings it back online. I can't find any primary source documentation about this. Is this part of all rpi hardware since the rpi 1? Do all rpis have the hardware to do this? Is it part of the hardware implemented by Broadcom or the RPi Foundation?
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Apr 26, 2024 23:46
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| # ¿ May 10, 2024 17:53 |
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