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Craptacular! posted:I think anything that endangers Boot Camp or other Windows-on-your-Mac capabilities is unlikely. You have way too many ordinary people who have to boot up Windows even if they love OSX. My uncle just bought an Air and still loves the Mac, but his attorney job requires him to be able to use Windows for at least one program. Boot Camp is getting tougher to support properly as Apple departs more and more from standard PC motherboard architecture, and Apple doesn’t seem to have much enthusiasm for it. At some point they may decide that virtualization is good enough for use cases like your uncle’s.
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Jan 1, 2019 08:51
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Wild EEPROM posted:2) I keep seeing stuff about the 15 port usb limit. I know exactly which ports I want/need to be those <15 ports (6x rear = 12, +1x usb2 inside the case); is there a guide to get this all set up properly? I do have usbinjectall but I have also read that it's not a good idea? I'm using a hub from one of the ports, and I have also read that this isn't a problem On an ASUS board with a 4770 I did not have to do anything about the 15 port limit. As for sleep, it kept immediately waking back up until I turned off wake on LAN in the Energy Saver preference pane. This is a bummer because I want WOL, but it does let it sleep properly.
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Jan 3, 2019 20:32
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Chris Knight posted:So far so good with the NUC. Sleep works which is a first for any Hack I've had Some i3s now have hyperthreading, congrats you have 4 hardware threads Example: https://ark.intel.com/products/95442/Intel-Core-i3-7100U-Processor-3M-Cache-2_40-GHz
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Feb 9, 2019 20:32
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. Have to go deeper into RehabMan's guides to see why my dual core i3 shows 4 cpus in Activity Monitor, I'm sure it's a SMBIOS or DSDT entry that needs to be tweaked.
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~Coxy posted:I feel like we're all hoping that the new driver model in System 10.15 will allow Nvidia to release their own drivers from here on out. I watched the WWDC session video on this and the new userspace driver model will not cover GPU drivers at all in Catalina. They're starting out with relatively simple drivers: USB devices, network interface cards, and serial port drivers IIRC. Being Apple, they did not announce any schedule for extending the new driver model to GPU drivers, or whether that will happen at all. It's a safe bet that if they do have such plans, they won't be realized sooner than 10.16.
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Aug 14, 2019 10:23
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That's not much of a data point on single threaded performance since the ARM cores available on AWS are not anything like the ARM cores Apple would be using in ARM Macs. Particularly not if you were using the first-gen AWS A1 instances, based on ARM Cortex-A72 cores (an old ~2015 design first implemented on 28nm). AnandTech has been running SPEC2006 against Amazon and Apple ARM processors (and others too), as well as Intel and AMD x86. While these results should be taken with a grain of salt, you may find them interesting. Take special note of 403.gcc, one of the least-gameable and most reliable subtests of the SPECint2006 suite. https://www.anandtech.com/show/14892/the-apple-iphone-11-pro-and-max-review/4 https://www.anandtech.com/show/15578/cloud-clash-amazon-graviton2-arm-against-intel-and-amd/5 Short version: the A13, in an iPhone where it is regulated to draw very little power, is shockingly close to the 9900K, a desktop processor (which, by being designed for the desktop, has advantages in 1T performance over most server processors, which tend to focus on packing in a lot of cores at lower clock speeds). I doubt the A13 in the context of an iPhone can sustain those performance levels indefinitely. But give it a laptop power profile and it could be quite good. I've been skeptical of ARM Mac stories for a long time, but only because I question the economics for the big Macs (especially the tower Mac Pro). Apple has the CPU core and SoC design expertise to do this if they have the will to pay for it. We'll see if this story is just another Bloomberg tech story in a couple weeks; if it's real, though, I expect they'll have very good performance to show.
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Jun 11, 2020 01:33
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Penisaurus Sex posted:Just because a processor design is very efficient and powerful at X power design doesn’t mean it will be even more powerful and efficient at a 5X power design, right? Entirely correct, and this is something that is often missed. However, being so close to state of the art desktop single thread performance at phone power levels strongly suggests Apple can target laptops and desktops without too much trouble. They don't have to shoot for 10x or even 2x their current performance to beat Intel's single threaded performance; it's more like 1.25x. Here's a link to some more AnandTech SPEC2006 tests, this time to show some scores for the i9-9900K: https://www.anandtech.com/show/14664/testing-intel-ice-lake-10nm/4 On 403.gcc: 9900K scores 59.45, Apple A13 scores 55.36 (higher scores better) That's drat close, and somewhat amazing considering one's a phone with probably a ~5W power budget for the whole phone (and governors to keep the average well below that), and the other's a 5 GHz 95W monster. The big question is this: How will they address the true pro market, where they need a chip that's competitive with a big Intel Xeon? (They just recently shipped a new design Mac Pro with the best CPU option being a 28-core Xeon W.) That's a bit more challenging than scaling a phone design by a factor of 1.25x. Technically, I'd guess Apple is more than up to the challenge. It's just a question of economics. They have to design something quite a bit different from a phone chip to meet those needs (note: this effort would be much more about the uncore than the cores). Since their volumes won't be high for such a chip, the engineering cost per unit sold won't be good.
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Jun 11, 2020 02:49
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Crunchy Black posted:Yeah I think all the doom and gloom is slightly overblown. There is zero chance that you don't get at least 2, maybe even 4 versions of macOS capable of being compiled for x86 machines due to the 2019 Pro. Now, do they have flags that require AVX512 instructions or some poo poo that make it essentially impossible to Hackintosh as we know it? Honestly, probably. But only time is going to tell, here. I know you were just trying to think of an example but fyi that specific doom and gloom scenario is already ruled out: Rosetta 2 cannot run AVX instructions at all. Not just AVX512, all of AVX is not supported. It'd be a little bit crazy for them to do that in Rosetta 2 and add a dependency on AVX512 support in a future version of Intel macOS! (this isn't as awful for x86 app compatibility as it sounds, btw. If app developers were doing things the right way, they should already have been calling APIs to detect whether the CPU supports AVX instructions and falling back to SSE2 if it doesn't, since not all Intel Macs are guaranteed to have AVX. Also there probably aren't a lot of Mac apps which use AVX that aren't getting ported quickly, heavy number crunching under an emulator ain't fun.)
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Jun 25, 2020 02:02
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mewse posted:Remember when they made the trash can mac pro they thought everyone would use thunderbolt for expansion. I think I saw a M1 macbook air review saying they're using intel chips for thunderbolt connectivity. Sadly I think the chances that they build out memory slots or SATA.. or a cpu socket are pretty miniscule. Apple implemented the Thunderbolt controller inside their own SoC. Those Intel chips people found in teardowns of M1 Macs are just Thunderbolt retimer chips. TB runs at a line rate of 20 Gbps, which is fast enough that it's super difficult to successfully get the signals through nasty evil things like connectors and almost any significant length of cable or PCB trace. So they sprinkle retransmitter / line conditioner ICs (aka retimers) at various points along the signal path to make it work.
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Nov 23, 2020 09:44
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mewse posted:That's interesting. Is it possible the controller implementation on board the SoC can run motherboard PCIe without re-timer chips? Yes. Inside the chips, the building blocks are something like this: * PCIe root complex (RC) - This implements the PCI Express protocol. It has an internal bus interface on one side, and a parallel PCIe interface on the other. Usually the latter is a standard called PIPE (PHY Interface for PCI Express). * DisplayPort controller - Outputs a parallel DisplayPort stream * Thunderbolt controller - Accepts parallel PCIe and DisplayPort, and tunnels the packets as TB packets. Has some form of parallel PHY interface on the other side. * SERDES / PHY - SERializer/DESerializer and PHYsical layer interface - Converts between parallel interfaces at a lower clock and serial interfaces at a higher clock, and contains the specialized mixed signal circuits needed to send and receive ultra high speed serial signals connected outside the chip Doing motherboard style PCIe just means that instead of connecting the PCIE RC to a Thunderbolt controller, they'd connect it (or some of its ports, it can have multiple PHY interfaces) directly to a PCIE PHY. E: We don't know for sure whether they support that path as an alternate operating mode in M1, though some recent regulatory filings about a M1 Mac Mini motherboard with 10G Ethernet suggests that maybe they do, since the obvious way to implement 10GE is with a PCI Express 10GE NIC. The other way they could implement it is to have the 10GE controller integrated into M1, but that seems a little dubious for a chip design which seems destined to go into a future iPad Pro model. BobHoward fucked around with this message at 23:00 on Nov 23, 2020 |
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Nov 23, 2020 22:56
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Lazyhound posted:From the Federighi interview I read, I wouldn’t expect the M1 to migrate back to iPads, it sounds like they’re moving to bespoke CPUs for each category based on modelling of anticipated workloads. What he wasn't saying is that it's incredibly common to identify two or more niches that can be served by a single silicon design, at the cost of building a chip large enough to include the set of all features required by all the product niches. Then you disable some of the features in variants for each niche. As an example, I've worked on a project where we sold the same silicon as two different products based on which package you put the die into - either wirebond or a flip-chip package. The FC package provided better power distribution, better heat dissipation, and more pins, so that version could run at higher clock speeds and supported all the I/O features. On the flip side, we were able to sell the worse version for less money since wirebond packages are considerably cheaper. Going back to M1, by specs (core counts, etc) A14 (the iPhone 12 chip) has roughly the same relationship to M1 as A12 (iPhone XS chip) did to A12X/A12Z (iPad Pro chips). It's a pretty good guess that a future iPad Pro will be powered by an "A14X" which turns out to be the same silicon as M1, but with Mac-only features disabled, and power limitations similar to or worse than the M1 Air. The reason you do this stuff is that each tapeout costs a poo poo ton of money and engineering resources, so if you can share tapeouts between two projects that's great. You have to balance that against how much of the silicon you're wasting in each product which uses it, the expected sales volume of each product (the more you sell the more sense it makes to do an individual tapeout, but then again if there's a very high volume product and a similar low volume product it may still make sense to have the low volume ride the coattails of the high), and other factors. This is why I'm SWAGging about M1 Mac Minis with 10G ethernet probably using a PCIe 10GE NIC chip rather than having the NIC on die. A single lane of PCIe Gen 4 is all you need to support an external PCIe 10G NIC, at very low cost in die area. Which helps justify getting that feature into the silicon despite the fact that the Mac Mini is basically certain to be the lowest volume product of all the things M1 goes into.
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Nov 24, 2020 03:09
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If it’s a HDD and it was dropped it’s far more likely that mechanical HDD parts broke than the little USB board on the back
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Dec 14, 2020 01:36
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Binary Badger posted:I mean, technically Hackintoshing is still alive for now, because Monterey is Intel / M1, but you can stick a fork in it when Apple announces that the next macOS will be M1 only. How are you computing these odds lol Back in the day they didn't drop PPC support until about 3 years after all the hardware went Intel. That was a somewhat rapid schedule, made possible because the PPC Mac population was relatively small to begin with, and Intel Macs were so far superior that everyone knew PPC hardware was just obsolete. Today, there's a lot of Intel Macs out there, and a lot of goodwill Apple would trash by abandoning them so quickly. And a lot of them probably won't age out of being viable quite as rapidly as PPC Macs did.
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Aug 4, 2021 02:56
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