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Ground floor! Worth noting RV comes from one of the original MIPSailures. He also wrote a book and invented RISC or sth. Total failure. MIPS was also used in the DECstation line of products; UNIX machines with the infamous puck mice. I played Netrek on them. 16 MB are enough for running UNIX, X11R4, twm and 4 xterms  Then Alpha was released, and it was absurdly fast going from a DECstation at like 25MHz to a 150MHz Alpha, like SSD-fast. Also worth noting Windows NT originally run on MIPS, Alpha and x86, remember the ACE alliance? https://en.wikipedia.org/wiki/Advanced_Computing_Environment MIPS is (was?) very popular in home networking routers. Broadcom and realtek make SOCs you're likely to find in ADSL routers and $15 Wi-Fi APs. You start seeing quad-core ARM chips in high-end APs now. The openwrt project has a list of supported hardware if you feel the need to janitor a MIPS CPU. e: MIPS was on CISCO routers, back then. The 7200/7500 series used them. (Juniper went x86 from the beginning, but they were doing the actual switching on ASICs) BCOM also had a lot MIPS-based Ethernet switch SOCs. I assume they're going ARM now? karoshi fucked around with this message at 15:16 on Jun 18, 2021 |
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Jun 18, 2021 13:37
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| # ¿ May 14, 2024 11:09 |
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Hasturtium posted:Friends of mine rooted for Alpha and were crestfallen when it was mothballed, but outside of a burly FPU and general 90s workstation competence I never quite got the big deal. Can anybody fill me in? Old memories: It was very fast. It was ~the future~. At launch time you had poo poo-slow SPARCs, M680x0s and tiny MIPSen to choose from for your workstation/server. x86 was a joke (dual-issue pentium and OOO pentium-pro/pentium2 fixed it a bit). SPECint/SPECfp were the go-to benchmarks back then. DEC promised a 1000x improvement in 10 years: 10x from clocks(possible, 150MHz -> 1.5GHz), 10x from arch(possible, in-order -> out-of-order), 10x from stolen socks or sth, I don't remember. There's an article by one of the original engineers, who then went to do the StrongARM processors. He commented on how for Alpha they had to innovate in power delivery, CPUs weren't 300W monsters back then, a DECstation with a 16MHz MIPS R3000 didn't need a 2 pound copper heatsink. Some of the OG Alphas had a weird heatsink connector made of 2 thick prongs coming off the CPU package, as seen on this page: https://www.cpu-world.com/CPUs/21064/index.html. So they were pushing X amps into the CPU which was unheard of, back then. (He then did the opposite for StrongARM). The ISA was new, designed for the "21st century", 64-bit only when everything else was 32-bit. No legacy. Also designed for high-performance, memory accesses had to be aligned on the first CPUs and so on (this was corrected later on, IIRC, trapping on some poo poo-code is not good for performance). Memory coherency was also quite decoupled, oriented towards multi-core efficiencies. The kernel docs for memory barriers still say: "- And then there's the Alpha." https://www.kernel.org/doc/Documentation/memory-barriers.txt HP buying DEC and burying it was a downer at the time. A printer manufacturer buying a highly innovative company. Killing AXP to push Itanium, smdh. But consolidation was in full force. There wasn't much of an economical point in sustaining your own proprietary ISA. e: also AMD 29k and m88k, hello NeXT, lol. karoshi fucked around with this message at 15:42 on Jun 18, 2021 |
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Jun 18, 2021 15:40
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Also x86 was supposed to die*, and AMD with it, due to lack of 64 bits. At the time 4GB was around the corner or already SOTA for servers. A great opportunity to leverage said process advantage to sail into a monopolistic future. AMD had other plans. Intel fanboys might optimistically say Intel wanted to replace the crusty, dead x86 arch with a new, modern baroque unproven kitchen sink arch. * mostly by not seeking to extend it as they had previously done
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Feb 14, 2022 22:43
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Subjunctive posted:I love this, and choose to believe it. major corporate strategy has been set on grounds much weaker than 30 lines of simulated instructions. where can I read more? Pretty sure I read that anecdote in https://www.amazon.com/-/es/Robert-P-Colwell/dp/0471736171/
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Jan 20, 2023 18:07
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I used to follow this project: https://latchup.blogspot.com/ https://jbush001.github.io/, a 32bit RISC processor with a 16 float wide SIMD FPU. There was a some work on a v2 version with a ring bus and multicore and even a hw triangle rasterizer, which was later removed. He even had a LLVM port. The project is now dead, but the blog was a nice read as far a I remember.
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Feb 18, 2024 22:46
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| # ¿ May 14, 2024 11:09 |
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There are also cheap smart NICs based on FPGAs being decommissioned by the cloud providers which you can find in ebay. Stuff like https://www.ebay.com/itm/185659756161, https://www.ebay.com/itm/144113217470 and https://www.ebay.com/itm/275258652279. Some of those FPGAs are non-standard and you'll need to use the non-free vendor tools. It's quite a rabbit hole, but some very enthusiastic enthusiast have gotten some of those to work. The altera/intel Arria parts have hard-FPUs (float32 MAC, IIRC) which can save you some resources, if you feel like integrating them into the upstream IP.  This would be specially useful for implementing GPUs.
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May 8, 2024 07:33
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