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computer parts posted:I think Apple has a thing where they get them first and then the other manufacturers get them a few weeks/months down the road. Vaio Pros, Lenovo Y410p's have been seen in the wild.
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# ? Jun 19, 2013 07:32 |
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# ? May 8, 2024 09:50 |
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Tab8715 posted:Just throwing in another piece of physical equipment is always better than hiring a human.
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# ? Jun 19, 2013 14:42 |
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I understand how hard-drives fail after years but for something with no moving parts - how do motherboards, RAM and Processors randomly fail after years on end?
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# ? Jun 20, 2013 04:40 |
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Electromigration. At higher voltages and temperatures, Quantum Bullshit is more likely to happen and the atoms that make up your interconnects literally teleport elsewhere a short distance away. Eventually, your interconnect stops connecting. Picture is of a tiny copper wire.
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# ? Jun 20, 2013 04:46 |
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Tab8715 posted:I understand how hard-drives fail after years but for something with no moving parts - how do motherboards, RAM and Processors randomly fail after years on end? Motherboards have capacitors which can fail, or behave badly in ways that make other things fail. Also, some components can be weakly soldered on, and eventually, after enough jostling, they finally fall off. This is why some manufacturers do a factory burn-in having the machine run on vibrating racks for several weeks. Power spikes can do damage, overheating can too. I don't know how RAM and Processors can randomly fail, but I think Factory Factory answered that. Edit: Also, moisture. Exposure to humidity will absolutely F things up. Try having a laptop in northern Australia or the Amazon. It's not a great idea. It's probably made worse if you carry the laptop from an air conditioned environment to the humid outdoors, because internal condensation is really possible. shrughes fucked around with this message at 05:11 on Jun 20, 2013 |
# ? Jun 20, 2013 05:07 |
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Factory Factory posted:Electromigration. At higher voltages and temperatures, Quantum Bullshit is more likely to happen and the atoms that make up your interconnects literally teleport elsewhere a short distance away. I think you're getting tunneling and electromigration confused. Electromigration doesn't require any kind of quantum effect to be explained: it's classical momentum transfer from electrons to the interconnect's atoms that causes it. Whole atoms at room temperature aren't much for qunatum weirdness anyway, they're simply too large and hot. Here's a decent summary of possible failure modes.
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# ? Jun 20, 2013 05:31 |
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Huh, that I am. Thanks for ensmartening me.
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# ? Jun 20, 2013 05:39 |
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So the solution for 10nm and lower is graphene then?
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# ? Jun 20, 2013 10:40 |
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The solution to everything is graphene. That poo poo is crazy.
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# ? Jun 20, 2013 12:57 |
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Problem is the best way to harvest graphene is to grab a pencil and draw on the sticky side of scotch tape. That doesn't tend to produce a uniform layer suitable for building chips out of.
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# ? Jun 20, 2013 13:28 |
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I guess we need to spend more research dollars on nano Scotch tape then. Someone's gotta beat 3M to it, dammit.
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# ? Jun 20, 2013 14:16 |
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With the graphene talk, I think some people might be interested in an article I found. Just as an idea of where graphene technology is right now, a very simple graphene frequency generator has been made to run at 1.2 GHz. Bear in mind, this is about as simple a circuit as you can get, doing nothing but oscillating. The current tech is nowhere near ready for something as complex as a CPU.
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# ? Jun 20, 2013 15:24 |
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Khagan posted:So the solution for 10nm and lower is graphene then? Aight, this was mentioned with respect to nanotubes earlier on the page, so to repeat: constructing a gate out of a material in a research lab is a far sight from mass producing chips containing billions of gates. There are a lot of promising materials to succeed silicon - nanowires, nanotubes, graphene, etc - but we're nowhere near bringing any of them to market. Hell, for a lot of them we can't even mass-produce pure samples yet. Now Intel claims to have a clear roadmap down to 5nm, but considering that there've been no papers on anything approaching successful mass-fabrication techniques for the usual silicon-successor suspects, my (amateur) guess is that the roadmap works with silicon all the way. The next big hurdle is more likely going to be electron (or ion) beam lithography than it is a new substrate.
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# ? Jun 20, 2013 16:25 |
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EUV, baby That article from ASML says they've printed 13nm features in a single exposure in a test environment. The difference between this and pie-in-the-sky graphene is that this is the logical evolution on the existing process (make the light wavelengths smaller to make smaller things). That said, some effects of EUV lithography are still pretty difficult to predict. Re: the Intel/ASML investment, you can read that article and see why they chose to do it. From a manufacturing perspective, the foundries have been drinking out of wells dug by Intel for a long time.
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# ? Jun 20, 2013 16:58 |
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After lots of fiddling and reading about the various BIOS settings in broken Chinese/English, I've finally hit the limit of my chip: 1.32V core, 1.3V uncore, with adaptive voltage on. Isn't close to stable at 4.8GHz even with 1.42V. I'm pretty satisfied, overall. A couple of tips: 1.) Your uncore will probably max out before the main core. No idea why, but try to find your max stable uncore first, then just leave it while you tweak the core speeds. 2.) Make sure your load level calibration is set to "level 1" or whatever provides the lowest amount of droop under load. 3.) Test your settings in override mode first, then switch over to adaptive voltage. Testing in adaptive voltage mode will skew your results because it adds .1V when AVX is being used, which will overheat the gently caress out of your processor. Even programs that use AVX normally won't do this; for some reason it only manifests with a stress test like Aida64. 4.) CPU input voltage at 1.9v vs 1.8 gave me an additional 200 MHz. Can't explain it. 5.) At 1.42V the chip was stable but it was throttling due to thermals big time. This is delidded, with a Corsair H100i. Try finding your thermal limit first, and then work around that. Voltage seems to have the greatest effect on thermal output, rather than clock speed. Also the screenshot was with the bugged version of CPU-Z, on the correct version, the idle voltage is 0.708V . That is just shockingly low to someone who started engineering school when 3.3V CMOS stuff was new and dangerous. forbidden dialectics fucked around with this message at 06:30 on Jun 23, 2013 |
# ? Jun 23, 2013 05:30 |
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So is that direct-to-die, or just fixing the IHS gap, or what? How are you cooling Haswell at 4.7GHz? I am sad now, my Sandy Bridge is at 4.7GHz with just a big drat cooler (D14) and I thought "well at least Haswell won't be hitting these clocks apart from the suicide run crazies " but here you've gone and ruined it, just ruined it. I'd love to know how. Edit: Quick aside, are you recommending high levels of LLC? I've always been a fan of high LLC over high constant voltage since it reduces vdroop under duress, but doesn't bake the chip quite as badly full time. I'd love to see that anecdotally vindicated apart from my own overclocking experience. If you're suggesting the opposite (lowest possible LLC, allow vdroop as intended) then phooey. I feel like vdroop is excellent for standard, non-overclocking folks because it's just part of how the chips work, but overclocking is by definition taking hardware outside of intended parameters, rules go out the window in favor of what gets you to the higher clock within a reasonable voltage and thermal envelope. And having a lot of immediate pulldown when trying to clock up seems like a terrible idea - in a distortion pedal circuit for guitar, doing that emulates tube sag and causes quite a bit of distortion. We don't want that at the "thousands of millions and hundreds of millions of nano-scale transistors" level. So, LLC max, or LLC min? Agreed fucked around with this message at 06:43 on Jun 23, 2013 |
# ? Jun 23, 2013 06:36 |
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Agreed posted:So is that direct-to-die, or just fixing the IHS gap, or what? How are you cooling Haswell at 4.7GHz? It's just fixing the IHS gap (bare dies are for seriously crazy people), with perfectly applied NT-H1. I had originally hosed up the application thinking that I knew better than the official instructions on how to apply it, and my temps were almost 10C higher than they are now that I've fixed it. FOLLOW THE INSTRUCTIONS! It's with a Corsair H100i, so a closed loop water cooler. I took a drill, hammer, and tin snips to my Antec 300 to squeeze the radiator into the front such that the fans are sucking cool air from outside of the case through the radiator. On ASrock motherboards, for whatever reason, LLC "Level 1" is the highest level, as in, it allows for virtually zero vdroop. So, I recommend the most aggressive LLC the motherboard is capable of. With Haswell, during stress test, even if the processor is completely stable in Windows, when that 100% utilization kicks in, the system will crash unless you have very aggressive LLC. When you first start the test, the processor will actually instantaneously peak temperatures over 90C (in my setup); then stabilize in the 70s.
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# ? Jun 23, 2013 07:00 |
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flavor posted:There is no situation in the English language where "off of" is correct, and using it is a sure sign of the author not being a professional writer, which puts the research in question, at least a little bit. That's what I meant.
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# ? Jun 23, 2013 08:02 |
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Josh Lyman posted:Exactly. "Based on" is the phrase. "Based off" is a malpropism.
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# ? Jun 23, 2013 08:15 |
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Josh Lyman posted:Exactly. "Based on" is the phrase. "Based off" is a malpropism. You've got it wrong. It's a special instruction set that has yet to be implemented in your architecture. Don't worry, we're still 100% compatible in most regards, it's just a little bit extra for those willing to pay the price premium for a more advanced Intel English Language.
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# ? Jun 23, 2013 08:17 |
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Alereon posted:That's not what these words mean. This is "off of" meaning "off from", in the sense of "40 PCIe lanes branching off from the processor". More importantly, a grammar argument is the stupidest possible argument. Ok, after having this now come up twice, if I may defend myself this once (I'll let it drop after this), it's not always THAT stupid. There is some correlation between good research and good grammar. It comes from being thorough and being willing and able to learn. In other sub-forums of SA people are rightfully mocking the spelling and cognitive abilities of the Tea Party and the way they express themselves. So... Aside from those considerations of whether this is good language, there's also the one that more colloquial expressions give away the fact that some information does not come from official sources. It matters to me a little bit whether information on CPU roadmaps, tech etc. comes right from the source or hearsay. I'll get "off of" the subject now.
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# ? Jun 23, 2013 08:36 |
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Alereon posted:That's not what these words mean. This is "off of" meaning "off from", in the sense of "40 PCIe lanes branching off from the processor". More importantly, a grammar argument is the stupidest possible argument. This is also an "across the pond" argument. "Off of" is perfectly cromulent in American English. It's only uncommon and considered wrong in the UK or to assholes.
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# ? Jun 23, 2013 09:02 |
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Apparently IVY-E is soldered to the IHS. Yay. http://translate.google.com/transla...%25E5%258B%2592 Not sure if thats really a 4960X. The IHS markings are not shown and the die size might be off. Still, its soldered.
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# ? Jun 23, 2013 19:30 |
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Nostrum posted:bare dies are for seriously crazy people) everyone in the 2000s must have been craaaayziiieeee Shaocaholica fucked around with this message at 19:39 on Jun 23, 2013 |
# ? Jun 23, 2013 19:33 |
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Shaocaholica posted:everyone in the 2000s must have been craaaayziiieeee Dude, we were. Do you not remember the pics that floated around back then of perfectly even crush marks on the corners of processors? We were taking risks back then and it's bullshit that it should be necessary now. Thankfully it looks like with diligence it's unnecessary, just getting the IHS to make contact seems plenty of temperature drop. Past that, silicon lotto.
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# ? Jun 23, 2013 20:50 |
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Shaocaholica posted:Apparently IVY-E is soldered to the IHS. Yay. Ivy-E vs Haswell-E what does 1 year buy you given that we have already seen that haswel is very relative to Ivy? Let me restate, how big of a deal are the new transaction and other instructions to desktop, virtualization sandboxes, and video encoding? It seems that much of the new architecture is based around feature sets rather than pure performance. If I recall, it can take some years before you see developers incorporate the new instructions. KennyG fucked around with this message at 02:47 on Jun 24, 2013 |
# ? Jun 24, 2013 02:37 |
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KennyG posted:Let me restate, how big of a deal are the new transaction and other instructions to desktop, virtualization sandboxes, and video encoding? Desktop: Depends on workload, probably meh. Virtualization: Meh. Video encoding: Also meh, but might vary by codec. TSX is meant for reducing overhead due to overly-safe programming of dependencies when you multi-thread a single task. Virtualization and video encoding largely do not have inter-thread dependencies. The nature of the workloads keeps threads independent. TSX will have bigger payoffs in stuff like ray-tracing, scientific simulation, CAD/CAM, and that sort of thing. In those workloads, it lets you cut out a lot of dev time and still get the high performance of carefully-tuned dependency locking, or it lets that dev time eke out a few more percentage points of performance. That said, the features should be rapidly adopted where they can be used. The programs themselves don't need to be rewritten, just linked to compiler libraries that have been. A number of the big-name libraries, like libgcc and some of the Microsoft libraries, already have TSX support enabled. Factory Factory fucked around with this message at 03:00 on Jun 24, 2013 |
# ? Jun 24, 2013 02:58 |
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KennyG posted:Let me restate, how big of a deal are the new transaction and other instructions to desktop, virtualization sandboxes, and video encoding? In regards to TSX, well written threaded code will not benefit at all. Poorly written threaded code can theoretically be improved dramatically with a re-compile or an upgrade to the runtime for interpreted languages. I'd love to see some hard numbers here too. There is a *lot* more code in the latter category than the former.
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# ? Jun 24, 2013 04:23 |
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Why is TSX only for poorly written multithreaded code?
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# ? Jun 24, 2013 05:20 |
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Ninja Rope posted:Why is TSX only for poorly written multithreaded code?
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# ? Jun 24, 2013 05:50 |
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Someone push a magic button that makes the haswell core i3's launch, I have four family computers that need upgrades. (when do they launch?)
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# ? Jun 24, 2013 06:41 |
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OldPueblo posted:Someone push a magic button that makes the haswell core i3's launch, I have four family computers that need upgrades. (when do they launch?) Here's a Chinese website with a slide telling us they will launch "1 September 12:01 AM".
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# ? Jun 24, 2013 08:28 |
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I heard a rumor (can't find the source, forgot to bookmark it) that the new line of Intel cpu's that are coming out will require people to use new power supplies for some reason. Does this sound like it has any merit or is it likely to be bullshit? Just wondering because I'm trying to hold off until 2014 before my new PC (the one I have works for now so I can wait) as it sounds like there is a lot of stuff that's going to be changing (new socket needed, possibly DDR4 memory being used, etc.)
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# ? Jun 24, 2013 16:58 |
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Haswell uses less power especially under idle which can cause some power supplies to freak out. It's best to find one that is Haswell-ready. As to the rest of your post, I don't know if you are talking about Haswell or the next iteration (Broadwell), but there probably won't be socketed versions of Broadwell, and it may or may not use DDR4.
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# ? Jun 24, 2013 17:02 |
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beejay posted:Haswell uses less power especially under idle which can cause some power supplies to freak out. It's best to find one that is Haswell-ready. Yeah I meant Broadwell (I think, the rumor mills are turning a lot and I keep hearing that they're going to skip Broadwell and go directly to Skylake). Also I thought the rumor about the next Intel chip being soldered ended up not being true? It's obviously hard to tell with all these different places out there saying different things, but I trust you guys know your stuff pretty well. *Edit* I checked and it looks like my PSU is perfectly fine for Haswell, hopefully will be for the next generation too. I'll probably change PSU's regardless though as I want a more energy-efficient one. Swartz fucked around with this message at 17:17 on Jun 24, 2013 |
# ? Jun 24, 2013 17:13 |
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There are no more rumors about the soldering, here's the Word of Intel: Tocks get socks. Haswell, Skylake, whatever's next - socketed. Broadwell, Skymont, whatever's after whatever's next - BGA only. Subject to change, since apparently the tick-tock cadence is getting a hiccup with Broadwell. We're getting Haswell Refresh without a process node switch, apparently due to troubles with 14nm.
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# ? Jun 24, 2013 17:26 |
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Factory Factory posted:There are no more rumors about the soldering, here's the Word of Intel: Tocks get socks. Thanks. Looks like Haswell-E it is than as I don't want to wait past 2014 for a computer. Sucks that it sounds like it will be released late that year though.
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# ? Jun 24, 2013 17:38 |
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Haswell Refresh is not Haswell-E and might be available earlier. I think it's kind of murky right now.
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# ? Jun 24, 2013 17:46 |
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There any articles or slides on what exactly is causing the problem with 14nm? Considering they already had the fabs under construction when the delay was announced, I'm guessing they were hoping to resolve some problems with yield but didn't?
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# ? Jun 24, 2013 23:51 |
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# ? May 8, 2024 09:50 |
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coffeetable posted:There any articles or slides on what exactly is causing the problem with 14nm? Considering they already had the fabs under construction when the delay was announced, I'm guessing they were hoping to resolve some problems with yield but didn't? Almost certainly, and big documents describing the issues, and memos about what they're doing with spin-downs and poo poo to fix it, but we'll not see any of that unless somebody at Intel decides they want to get the dog-poo poo sued out of them to the point of totally ruining their life forever and breaks NDA on incredibly proprietary technology.
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# ? Jun 25, 2013 04:16 |