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eschaton posted:are there any examples you can point to of good or bad Verilog, VHDL, and so on? fpga tooling on linux is only good for running headless builds imo; if you need to use the gui at all, stick with windows. linux is a second-class citizen (as it should be)
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Feb 23, 2015 20:13
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sund posted:i cut my vacation short a day to assist with some qualification testing that we ultimately failed and spent two weeks poring through code and manuals, staying late making one off builds that i knew didn't make sense just to satisfy someone else's theories and pestering support engineers at another company to figure out why their product was flaking out when we were trying to using it. finally stole the scope from the hardware department today and found out the power bus drops half a volt below the absolute minimum voltage required for the flaky part when it performs a certain operation. three people assuring me it was rock solid and double checked, while hinting that i was probably toggling a non-existent reset line. loving up (non-exotic) power supplies is inexcusable in my book you have to basically ignore your datasheet entirely, or have dumb-rear end system-level requirements
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Feb 23, 2015 20:15
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movax posted:fpga tooling on linux is only good for running headless builds imo; if you need to use the gui at all, stick with windows. linux is a second-class citizen (as it should be) this man speaks truth
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Feb 23, 2015 20:30
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fpga tooling is never good.
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Feb 23, 2015 20:33
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Bloody posted:fpga tooling is never good. well if you want to take a lot of breaks while its
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Feb 23, 2015 20:43
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hobbesmaster posted:well if you want to take a lot of breaks while its i used to have 2 hour builds, I'd be lucky to get five builds a day. lots of multi-tasking
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Feb 24, 2015 01:53
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how on earth am i using an fpga toolchain released in the past year that does not support systemverilog, a thing that has existed for over a decade
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Feb 24, 2015 21:40
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Bloody posted:how on earth am i using an fpga toolchain released in the past year that does not support systemverilog, a thing that has existed for over a decade embedded tools are all terrible because as engineers we learn how to work around problems as a living
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Feb 24, 2015 21:45
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its true. instead of using some of the new for loop constructs sysV allows, i'm writing a c# program to autogen some spaghetti code.
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Feb 24, 2015 21:46
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i have now written thousands of lines of verilog in the past few days and other than annoyances like the above this has been less painful than i was expecting. when does the other shoe drop?
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Feb 24, 2015 23:10
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Bloody posted:i have now written thousands of lines of verilog in the past few days and other than annoyances like the above this has been less painful than i was expecting. trc.exe has stopped working
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Feb 24, 2015 23:36
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thank god im not using xilinx tools
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Feb 24, 2015 23:41
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oh good still debugging is a bitch but thats true for MCUs too
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Feb 24, 2015 23:45
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Bloody posted:when does the other shoe drop? fs, sf and temperature. ff/ss if you're unlucky
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Feb 25, 2015 08:16
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Bloody posted:its true. instead of using some of the new for loop constructs sysV allows, i'm writing a c# program to autogen some spaghetti code. I might be kind of retarded but what for-loop construct does sysV have that V2001 doesnt? I use for-loops in generate statements and function calls all the time and it synthesizes ok with xst Poopernickel fucked around with this message at 09:05 on Feb 25, 2015 |
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Feb 25, 2015 09:03
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Because im the biggest idiot on the planet, i took on the task of makefile-automating my builds with Xilinx ISE. Easy to do terribly, fucken hard as poo poo to do right Stupid pointless things done thus far: Wrote a dependency generator for ISE projects Wrote a dependency generator for EDK projects Figured out how to generate coregens on the command line to avoid putting ngcs in the repo Figured out how to conditionally set ISE parameters from the command line Killed self literally, I am a ghost now
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Feb 25, 2015 09:10
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Poopernickel posted:Killed self literally, I am a ghost now stay safe Xilinx ghost
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Feb 26, 2015 09:54
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Poopernickel posted:I might be kind of retarded but what for-loop construct does sysV have that V2001 doesnt? I use for-loops in generate statements and function calls all the time and it synthesizes ok with xst break; and continue;
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Feb 26, 2015 16:20
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movax posted:fs, sf and temperature. ff/ss if you're unlucky i don't know what these things mean
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Feb 26, 2015 16:20
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Bloody posted:i don't know what these things mean asic nerdspeak for chip-fab process variance it puts the P in PVT
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Feb 26, 2015 18:39
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wot is a good general purpose tip to get http://www.ebay.com/itm/1PC-T12-Series-Solder-Iron-Tips-for-Hakko-Soldering-Station-FX-951-FX-952-/251734782842 or should i just get all of them http://www.ebay.com/itm/T12-Series-Solder-Iron-Tips-for-Hakko-Soldering-Station-FX-951-FX-952-/251860177741 e: ill mainly be doing repair/maintenance on audio stuff so mostly through-hole or point-to-point soldering Chill Callahan fucked around with this message at 05:23 on Mar 1, 2015 |
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Mar 1, 2015 05:20
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i use something fatter than a fine tip for just about everything i do ranging from 0201s to through hole so i dunno a good general purpose tip of a moderate size
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Mar 1, 2015 07:35
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depends, people who like chisel-tips are shitlords who hate conical tips and will tell you they are poo poo. people who like conical tips are shitlords who hate chisel-tips and will tell you they are poo poo. buy them all and use the ones you like.
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Mar 1, 2015 08:20
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Wild EEPROM posted:depends, chisel/screwdriver tips are pretty versatile cause you can get a big surface area on the flat or a small surface area on the edge. cones are good cause you can just go further up on the cone i guess. i like the former but the latter is fine if you like that
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Mar 1, 2015 09:27
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i prefereert chisel it's better for smd work
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Mar 1, 2015 14:16
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i like chisel tip, i feel like they heat better than point tips. it's really personal pref tho
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Mar 1, 2015 15:00
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Wild EEPROM posted:depends, 
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Mar 1, 2015 16:44
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movax posted:fpga tooling on linux is only good for running headless builds imo; if you need to use the gui at all, stick with windows. linux is a second-class citizen (as it should be) if i were to install the Xilinx tools on Linux, would that be sufficient for new development if I just did everything through makefiles? or does the tooling really insist on an IDE-generated project file and so on, even for command-line builds? kind of like the IDE that I work on does
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Mar 2, 2015 00:55
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eschaton posted:if i were to install the Xilinx tools on Linux, would that be sufficient for new development if I just did everything through makefiles? or does the tooling really insist on an IDE-generated project file and so on, even for command-line builds? I haven't had the chance to play with Vivado yet, but if you're on 6-series FPGAs (like the Spartan 6), then you're stuck with Xilinx ISE. It's not too hard to do a pure non-IDE Makefile-based approach for simplish designs, and maybe even a coregen or two - once you start to throw EDK in the mix, it turns into waaayyy more of a clusterfuck trying to do the whole thing with a non-project flow. of course I just finished automating an ISE-based flow with Make (using xtclsh and xps -nw), and it was a pretty rough ride too so I dunno Project-based gotchas that I had to deal with: 1) Out of the box, some of the GUI tools are broken on other linuxes than RHEL6/Centos 6 - I did mine on Fedora, and I had to dick around with some library stuff to get the tools running. Some of the obscure GUI stuff still doesn't work (FPGAEditor, I'm looking at you) 2) It was a pain in the rear end to do the dependency-tracking in Make - I had to write python helper scripts to generate .d files 3) Some of the compilation steps are fundamentally grouped-output kinds of things, where one process has a bunch of dependencies and produces a pile of files. Handling that properly in Make is surprisingly hard to do robustly 4) If you're doing a project-based flow and controlling the tools with xtclsh or xps -nw, the tools sometimes want to change the timestamps on their project files even if nothing changes. My makefiles set the project files to read-only before calling the tools, and change them back afterwards edit: the silver lining is that the Linux tools really run a lot faster than their Windows equivalents Poopernickel fucked around with this message at 09:04 on Mar 2, 2015 |
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Mar 2, 2015 08:58
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on the bright side I learned a shitload about a bunch of make's obscure features so 
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Mar 2, 2015 09:01
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fpgas: not even once
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Mar 2, 2015 19:58
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Wild EEPROM posted:depends, I love the bent conical tips, at an old job they had some nearly 90-degree bent tips and they were super nice. I only have some 45 degree ones but they are still real good.
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Mar 2, 2015 22:47
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Zaxxon posted:I love the bent conical tips, at an old job they had some nearly 90-degree bent tips and they were super nice. I only have some 45 degree ones but they are still real good. those are the business for SMT parts. i use a real small bent conical for SMT and a big wide chisel tip for through hole stuff
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Mar 2, 2015 22:52
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Sagebrush posted:I really like the look of the rigol 2072 or whichever one is the $800 one with the fast update and density plotting to look like an analog scope we just got a ds1104Z (bit lower sampling rate, more channels, same ULTRAVISION) at the lab here. It hasn't died yet, but we're not throwing the box out either (thanks rigol). I'll stick with my old tektronix for now though.
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Mar 3, 2015 18:21
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movax posted:pcie im back to this problem (lol) i have an fpga dev board with an ulpi chip on it but i have no ulpi ip and i cant find any and im reading the spec and it sounds tedious as gently caress why isnt this easier said dev board also has pci-e 1x and i think ip for it but at some point i want to hook this to a laptop and said laptop probably doesnt have expressport and i know i dont have an adapter and we could buy all these things but i suspect usb would just be preferable it also has some gigE phy but it doesnt seem to have a data sheet and i think sgmii is just a different flavor of nightmare from ulpi so w/e
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Mar 3, 2015 21:28
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basically ive got an fpga sourcing 25 mbits of data and i want to get it into a pc. in the future it will be sourcing more like 100 mbits but right now i mostly care about the 25 mbit case.
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Mar 3, 2015 21:28
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[yak shaving intensifies]
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Mar 3, 2015 21:31
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and no i havent spent the past 5 months on this yak there were many yaks that came and went in between i just happen to now be back on a yak from 5 months ago
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Mar 3, 2015 21:34
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Bloody posted:im back to this problem (lol) with gigE you at least don't need to worry about usb drivers or any poo poo - do teh gigz
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Mar 4, 2015 07:27
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Poopernickel posted:with gigE you at least don't need to worry about usb drivers or any poo poo - do teh gigz there seems to be ip available for it too but lol now im bottlenecked by needing to update my ide and it is yankin my chain
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Mar 4, 2015 17:36
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