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eschaton posted:(eg since the early 1990s) triggered so hard right now
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Dec 18, 2015 13:16
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Jerry Cotton posted:triggered so hard right now level or edge triggered?
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Dec 18, 2015 21:47
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Jerry Cotton posted:triggered so hard right now so edgy
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Dec 18, 2015 21:50
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made a 3.3V to 5V level shifter today with some resistors and a pair of transistors and it actually worked! soon I will be able to try tilting at this 100 kbit windmill with an 84 MHz 32-bit part instead of a 16 MHz 8-bit part goddamn 12/O/1 protocol, what were those fuckers at HP thinking? eschaton fucked around with this message at 08:01 on Dec 21, 2015 |
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Dec 21, 2015 07:58
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do you have to worry about transistor switching speed? or is 200khz (i would guess, for 100kbit) just like totally bog slow as far as a transistor is concerned i know that some types are faster than others but that's it
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Dec 21, 2015 08:13
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everything I've seen says that I don't have to worry about it at that rate with a 2N2222
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Dec 21, 2015 08:57
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Sagebrush posted:do you have to worry about transistor switching speed? or is 200khz (i would guess, for 100kbit) just like totally bog slow as far as a transistor is concerned just do s back of the envelope calculation with the gate capacitance and gate drive current to check. rise time less than 10% of the signal period should be plenty for nice clean edges
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Dec 21, 2015 21:49
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at 200 kHz even a saturated transistor should switch fine, biggest trap is using too high value pull-ups if you're doing RTL gates fwiw LTSpice does a pretty good job simulating standard 2n3904/bc547s so if you really care just pop it in there and do an AC sweep or run some steps into it
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Dec 21, 2015 21:53
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at work currently i'm writing code for some on board realtime coprocessors on a ti soc that runs linux on its main core. all the joys of a super limited environment and also no way to directly debug it with a jtag, as far as i can tell. cool also what should i do with the random dev boards i've taken from work because nobody wanted them? i have one of atmel's cortex m boards, a newer launchpad, and an fpga.
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Dec 22, 2015 20:46
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im going to take my stupidly overpowered dev board and use it to host irc/nethack tmuxes because osx is determined to drop connections one of these days
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Dec 22, 2015 20:50
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JawnV6 posted:im going to take my stupidly overpowered dev board and use it to host irc/nethack tmuxes because osx is determined to drop connections world's most advanced operating system
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Dec 22, 2015 21:58
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so an Arduino Due actually has enough speed to bit-bang this protocol, and it appears something is happening also my level shifters work almost perfectly I might actually be able to make this thing work tonight!
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Dec 23, 2015 01:38
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Mr Dog posted:world's most advanced operating system thats right its above silly legacy features thats what a half dozen VMs with every vendor's/board's artisinal bespoke toolchain configured are for
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Dec 23, 2015 06:26
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eschaton posted:I might actually be able to make this thing work tonight! good luck! are you using an LA? worth the time to make a parser or other visualization do you have an existing system to capture 'good' traffic from and compare or is this from the datasheet
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Dec 23, 2015 07:13
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JawnV6 posted:good luck! thanks, it hasn't yet worked, though I think my input line wasn't actually physically connecting I might have to crack open one of my myriad HP-HIL ID boxes (used for node locking ancient CAD software) and connect straight to the terminals or something like that just to reduce the variables in play I've not really tried a logic analyzer seriously, due to the lack of a clock to use, maybe I should just run a PWM at 200 KHz or something? quote:do you have an existing system to capture 'good' traffic from and compare or is this from the datasheet just the reference manual I have no HP-9000/300, 400, or early 700 hardware (alas)
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Dec 23, 2015 08:01
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eschaton posted:I've not really tried a logic analyzer seriously, due to the lack of a clock to use, maybe I should just run a PWM at 200 KHz or something? clock? why do you need a clock to use a LA? take $50 hardware, sample at 2MHz or something. turn it into a .csv and analyze it in your scripting language of choice turn sw problems into hw tests, turn hw problems into sw tests
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Dec 23, 2015 08:35
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huh neat device and open sores project. someone should update it to target one of those ~$200 zynq boards. 1GB of capture ram plus fpga fabric/IO which can handle >200Msa/s would make a much more powerful analyzer. also theres probably clever things you can do with the dualcore cortex-a9 and other zynq periphs (minimum, obvious idea: talk to the analyzer over GbE)
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Dec 23, 2015 10:43
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that's the one I've been using for a few years now, there's probably better things available. its just so rare that I need something much better, but my mcu is at 120MHz so most peripheral bringup is "run it slow, get whatever POL/PHA and !CS handling it's expecting correct, speed up & verify in SW" above 200Msa/s i suspect you're close to the USB2 limit, so it's time to get fancy with triggering or live with what can be stored without speaking to the PC during capture
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Dec 23, 2015 20:28
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if you need more just buy the saleae for $200 or w/e
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Dec 25, 2015 06:28
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JawnV6 posted:clock? why do you need a clock to use a LA? my HP 1660cs either wants an external clock—for each pod—or I have to make it run a clock upon detecting the falling edge of the start bit, and I wasn't able to get that to work perhaps that was related to my connectivity issue though now that I'm back and recovered from visiting family I may give this another go
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Dec 29, 2015 00:27
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also if anyone wants a cheap FPGA board with a Spartan 6 LX9, Maker Shed has the Mojo v3 on sale for about fifty bucks until sometime tonight (about 30% off)
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Dec 29, 2015 00:31
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you want it to be in "Timing" mode, not State or SPA
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Dec 29, 2015 00:46
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so i've got my christmas idiot project dollars in, and I'm getting a bus pirate for funsies with learning some new chips I'm ordering. I'm also thinking about getting a cheapo LA, since I've never used one. Dangerous Prototypes makes the Logic Pirate, which works with SUMP, an open source logic analyzer software. however, I also have seen some stuff about the Salae Logic4, or even this cheap looking chinese thing: http://www.seeedstudio.com/depot/LA1016-Logic-Analyzer-p-2214.html I currently only ever do stuff on 16 Mhz arduino things, and I think if I end up moving to faster micros I'll probably have the money at that point to pick up something better. question is: what's the best choice for me at this point? I haven't had a (known) need for a logic analyzer yet, but it'd be nice to have one as I'm learning more, and I think it'd be nice to be able to just have a tool to visualize what I'm doing, etc. I don't need pro levels of channels or anything, but it'd be nice to have something reliable and I can't really find any reviews for them.
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Dec 29, 2015 05:14
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eschaton posted:level or edge triggered? oh sorry i meant to say fingered
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Dec 29, 2015 05:19
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wasn't someone here going to try clash for VHDL generation? bloody maybe? I keep seeing their emails about updates to it and was hoping for a trip report
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Dec 29, 2015 08:40
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haven't touched it yet
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Dec 30, 2015 04:32
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Fanged Lawn Wormy posted:so i've got my christmas idiot project dollars in, and I'm getting a bus pirate for funsies with learning some new chips I'm ordering. I'm also thinking about getting a cheapo LA, since I've never used one. Dangerous Prototypes makes the Logic Pirate, which works with SUMP, an open source logic analyzer software. however, I also have seen some stuff about the Salae Logic4, or even this cheap looking chinese thing: http://www.seeedstudio.com/depot/LA1016-Logic-Analyzer-p-2214.html I haven't used those specifically but I will say that having an LA for me has been a life saver for SPI i'm bad at programming and almost always mess it up somewhere and never realize whats going on until i put it on the LA
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Dec 30, 2015 05:05
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Fanged Lawn Wormy posted:I haven't had a (known) need for a logic analyzer yet, but it'd be nice to have one as I'm learning more, and I think it'd be nice to be able to just have a tool to visualize what I'm doing, etc. I don't need pro levels of channels or anything, but it'd be nice to have something reliable and I can't really find any reviews for them. 1) chips aren't talking during bringup or debug and you need to verify edge timings, reset/poweron timings, etc. oscope either has too few channels or levels & edge quality have already been verified. i had a lovely SPI clock signal that was totally invisible to a LA, needed an oscope. eschaton's recent troubles are also here 2) chips are talking, but protocol-level things need to be analyzed. you're not interested in edges, you're interested in bytes or larger frames of data. this is where you really want a LA's sw package to interpret a million samples and dump out a csv showing the traffic that went back and forth 3) debugging critical SW issues by exposing hints at behavior over fast pin transitions. you can't call printf from an ISR, but you can flip a pin without impacting timing too badly if you're using known components with arduino libraries, you'd probably only need to do 2. even so, having a LA that will let you capture traffic (e.g. to replay them from a PC) is a useful tool. if you're going to be getting new things and doing driver development, a LA can make debugging a lot easier. I find them really useful, but I used to debug circuits a lot more often than software so i move problems into that domain more frequently than I should
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Dec 31, 2015 01:32
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favorite use case for LAs is debugging parallel ports and fpgas in general. nothing like breaking out a 16 pin bus and just looking at everything at once. most serial poo poo I just do with a scope because four channels is plenty
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Dec 31, 2015 19:52
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so i think i've got all the photodiode / other poo poo figured out 'enough' to know that poo poo is definitely possible, plus what all the signals do now i'm thinking about the caching / memory scheme though for loading an ISO -- i can certainly run a fast enough clock to generate EFM/EFM+ encoded data on the fly, but like -- i can't put 16GB of RAM on this thing to hold an entire image in there. based on the motor and sled signals, i can translate those into a position, so i'd need some kind of predictive guesswork to figure out where the sled is slewing too and pre-load that chunk of data how did console programmers usually do this poo poo from a sw pov? the toc is mastered onto the disc after authoring, did they write their own low-level cd-rom code? most of the lag in seeking in an optical drive comes from physically moving the laser head and then re-focusing; i have no way of knowing the target destination so i have to simulate that, and then i have as long as it takes to re-focus before i'm slower than a real thing. e: now i wonder what like daemon tools and virtual iso drives do -- just some file handles and the underlying os handles digging up the required data? at least with that scheme you know the exact command being sent to the drive and you can choose to intrepret it as you see fit movax fucked around with this message at 00:10 on Jan 2, 2016 |
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Jan 2, 2016 00:07
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movax posted:how did console programmers usually do this poo poo from a sw pov? the toc is mastered onto the disc after authoring, did they write their own low-level cd-rom code? i have a fuzzy memory about a CD or DVD console dev going into detail about structuring the data on disk, the assets would trivially fit, but to keep load times down they had to stripe entire levels together and duplicate a lot of things. spyro maybe? what are you going to use for storage medium? USB mass storage stick? there might be some software that expects precise loading time but I'd wait until you actually hit a problem with it before optimizing
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Jan 2, 2016 02:08
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I'd love to use Ethernet and do everything via nfs/smb, but for initial development, a sd card or big SPI flash might be the best option. can get one of those games that's only a few hundred mb in size to use as a test case; if I design my interfaces properly, it can be pretty modular. when the console drive slews say from the beginning of the disc to the middle, at the end of that sequence I'll know where I should be but then I'm screwed because I need to come up with the data pretty loving fast; on a real disc, the physical bits are waiting there of course.
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Jan 2, 2016 02:26
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can you cache the first 100mb of each sector and get the network request back in time for the rest of it? idk, something like that. worst case record the access pattern and build up a sequence for each image
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Jan 2, 2016 03:00
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movax posted:so i think i've got all the photodiode / other poo poo figured out 'enough' to know that poo poo is definitely possible, plus what all the signals do called it, i knew this would be an interesting problem for you. you can trivially short circuit the tracking servo loop by just not simulating ever being offcenter from the track, but you have to close the coarse head positioning servo loop somehow as i understand it, this loop uses data read from the head (sector #s in sector headers) as feedback, so yeah you're gonna have to guess what it wants, feed it some data, and keep reacting to its control outputs what kind of signals control the main spindle motor and head positioner? pwm? if the drive's a pure clv drive you might be able to estimate how fast it wants the spindle motor to spin from the pwm duty cycle, and from that infer the head position actually nm a clv drive should be using a servo loop to control linear velocity and if you never very your playback freq from the ideal clv rate the control loop wont even be changing the spindle motor speed if the drive is cav or p-cav you have an entirely different class of problem: the raw bitrate the drive expects changes depending on head position quote:how did console programmers usually do this poo poo from a sw pov? the toc is mastered onto the disc after authoring, did they write their own low-level cd-rom code? by "toc" do you mean some kind of custom data structure? because i wouldnt be surprised if most consoles use either iso9660 or a 'custom' but mostly off the shelf filesystem quote:most of the lag in seeking in an optical drive comes from physically moving the laser head and then re-focusing; i have no way of knowing the target destination so i have to simulate that, and then i have as long as it takes to re-focus before i'm slower than a real thing. well i would be worried about making it work first and then see if you can improve performance going back to the question of whether you can estimate target dest... forget what i said about back-inference from spindle speed, i seem to remember seeing worm gears in odd head positioner assemblies, which prob means its driven by a stepper. if so thats pretty great, it's much easier to try to track where the drive wants to be if it's running a stepper motor quote:e: now i wonder what like daemon tools and virtual iso drives do -- just some file handles and the underlying os handles digging up the required data? at least with that scheme you know the exact command being sent to the drive and you can choose to intrepret it as you see fit in unix terms those are block device drivers which happen to service requests by making filesystem calls to read the blocks from a file, so its way simpler yeah. you are definitely hooking into the system at the place where this problem is hard. if the console odd has a standard ata interface it might well be easier to replace the entire thing with your fpga because that would let you do something a bit closer to daemontools etc, but i expect you aren't so lucky
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Jan 2, 2016 04:17
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movax posted:i can't put 16GB of RAM on this thing to hold an entire image in there why not? RAM is cheap and there are ready-made IP blocks for RAM control to include in your FPGA design
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Jan 2, 2016 07:38
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ugh, the user guide is less than 50 pages. every sequence diagram starts from boot. connections never close. i wish i lived in that reality
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Jan 5, 2016 20:01
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just realized the webserver my former coworker wrote that assembles resources by writing them to flash before lwip sends them out is not going to work so well with the small and cheap NOR flash we specced changing the webserver to serve from dram should be nice and fast, at least big shtick energy fucked around with this message at 20:47 on Jan 20, 2016 |
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Jan 20, 2016 20:41
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too much work, just get some FRAM instead of NOR flash
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Jan 20, 2016 21:20
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longview posted:too much work, just get some FRAM instead of NOR flash haha, list price for a 1Mbyte chip is like $50
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Jan 20, 2016 22:17
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DuckConference posted:haha, list price for a 1Mbyte chip is like $50 that's why i only used a 512 kbyte chip in my design (also ~1 gbit of NOR)
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Jan 20, 2016 22:32
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