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Do nvme drives get close to saturating PCIE 3.0 16x? I guess multiple drives is where you want all the lanes you can get. I got a 1050 ti on 3.0 4x connection that doesn’t take any performance hit at all. I’m sure high end stuff would feel the squeeze though. Either way, PCI-E 4.0 is mostly important for storage, right?
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Apr 28, 2019 00:07
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Laslow posted:Do nvme drives get close to saturating PCIE 3.0 16x? I guess multiple drives is where you want all the lanes you can get. Storage and 100GbE+ network mostly. Also GPUs running intensive machine learning tasks benefit a lot with peer to peer transfers. There are JBOFs (just a bunch of flash) nvme arrays that have pcie switches to fan out to a lot of nvme drives (20+) and they’re very capable of saturating a x16 gen3 link, soon to be gen4 when scaled up. A benefit that the wider bus has is a lower latency time as well, since more of the header and data can be transmitted per cycle. Usually it’s not a huge deal for video cards though, so not too surprising it runs fine at x4. Really the only way to notice any improvement is to benchmark the various widths side by side and even then it’s not a huge difference.
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Apr 28, 2019 00:14
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Laslow posted:Do nvme drives get close to saturating PCIE 3.0 16x? I guess multiple drives is where you want all the lanes you can get. Nope. Not even close except in highly-specific and specialized circumstances like priz described. And consumer boards with 2-3 M.2 sockets simply divvy up the bandwidth between them if there's no PLX chip. And to my knowledge the first-gen PCIe 4.0 NVMe drives are getting ~300-500MB/sec more in initial testing than their 3.0 versions. Keep in mind it took until the 2080Ti to finally have a GPU that was capable of stressing or maxing out a PCIe 2.0 x16 slot. There are hobbyists taking advantage of those cheap Inland Phison E12 drives on HardForum with RAID 0-ing 2-3+ of them together and it's still only hitting ~5000MB/sec. A PCIe 3.0 x16 lane has a theoretical max bandwidth of 15.75 GB/s.
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Apr 28, 2019 00:17
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I bought a 960 Evo because I wanted to know for myself, but compared to a 840 Pro there's like no real difference in the consumer space. I can do 2 GB/s benchmarks, but in terms of real world use there's very little difference. Storage speed won't be the thing pushing PCI-E forward.
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Apr 28, 2019 00:24
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Optane and Z-NAND (when/if they become more affordable) will be more noticeable, but for most people SATA SSDs have become so commonplace that unless something is 5-10+ seconds faster, it's not going to have the same  factor.
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Apr 28, 2019 00:31
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The nice thing about nvme over pcie is you can mux out to a lot of drives much like having SAS expanders. And you can mix drives of different widths and speeds as long as the upstream ports don’t bottleneck things. And you can connect host to host in all sorts of funky non transparent bridging implementations for failover or shared drive caching or multi function device sharing. Also just for lols the spec for gen 5 pcie is rolling hot and heavy and the gen4 to gen5 transition will happen much much faster than gen 3 to gen4 did (at least in the enterprise space). Would mean that x1 gen5 nvme drives will be the same throughput speed as x4 gen3s, for much denser designs. Gen4 is going to be a blip, time wise compared to gen3.
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Apr 28, 2019 00:39
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Thanks for going over that for me. I was just wondering why people were making a big deal about PCIE 4.0 on other boards. I will look in to a ridiculous RAID0 nvme setup when I upgrade to a Zen 2 Threadripper or whatever Intel’s got if they finally play ball on price in the workstation segment, if only for the novelty of BIG HUEG NUMBERS on CrystalDiskMark since it should be cheap enough now that SSD prices are hitting bedrock.
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Apr 28, 2019 02:44
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priznat posted:The nice thing about nvme over pcie is you can mux out to a lot of drives much like having SAS expanders. And you can mix drives of different widths and speeds as long as the upstream ports don’t bottleneck things. And you can connect host to host in all sorts of funky non transparent bridging implementations for failover or shared drive caching or multi function device sharing. Isn't a lot of that due to the fact that all the older traditional ways we made MORE BUS BIT GO FASTER! kinda stopped working nearly as well when we got to the signal speeds we're looking at for PCIe4? Also needing 10nm or 7nm litho to avoid having a 50w PCIe bridge chip to run it all?
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Apr 28, 2019 03:17
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Methylethylaldehyde posted:Isn't a lot of that due to the fact that all the older traditional ways we made MORE BUS BIT GO FASTER! kinda stopped working nearly as well when we got to the signal speeds we're looking at for PCIe4? Also needing 10nm or 7nm litho to avoid having a 50w PCIe bridge chip to run it all? The high speed analog phys for gen4 don't consume a lot of additional power over gen3 ones. This will hold for gen5 as well so really you'd be getting double the number of devices connected to whatever digital you are running (switch, CPU) without a big power penalty. Since datacenter people are all about the power consumption, this is a big deal. Additionally there will be more uses as data rates saturate with things like 400Gb Ethernet and probably cases that haven't even been thought of yet! It doesn't need the bleeding edge geometries either, once the analog block is in place (granted, this is the tricky bit!) 14nm is fine for the attached digital. The jump from gen4 to gen5 isn't as big as gen3 to gen4 either, with really the only change being the datarate. Gen4 introduced some new stuff in the pcie config space along with some new functionality that was in PCIe 3.1 but most people didn't bother with that and the standards body never even actually tested for 3.1 compatibility. There was a ton of new phy level equalization stuff for gen4 as well that will be straight up carried over to 5. Laslow posted:Thanks for going over that for me. I was just wondering why people were making a big deal about PCIE 4.0 on other boards. I have a setup at work going through a POWER9 Gen4 slot to a gen4 switch to 16 Gen3 x8 NVRAM drives (basically ramdrives with flash backups) using fio and it gets over 29GB/s (theoretical max line rate is 31.5GB/s, but with headers and other assorted non payload stuff it brings it down a bit) 
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Apr 28, 2019 04:01
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Paul MaudDib posted:You mean on Coffee Lake? The new stepping that Tom's was getting abnormally good results on? Link? Yes. Source is some random german video podcast where he states that he has tested samples.
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Apr 28, 2019 06:31
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Khorne posted:IThey've been developing 7nm and what comes after 7nm in parallel. Intel does a lot of business. They aren't just a CPU company. I don't even think other fabs have the capacity, given their other customers, to fab all of what intel makes. Correct. The global fab output doesn’t have an Intel-sized chunk of capacity just waiting around idle.
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Apr 28, 2019 16:02
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Laslow posted:Thanks for going over that for me. I was just wondering why people were making a big deal about PCIE 4.0 on other boards. Yeah, about that. There's stuff in the news about manufacturers slowing production.
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Apr 29, 2019 08:51
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Kerbtree posted:Yeah, about that. Yeah, I think they've decided where the bottom should be in flash prices...
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Apr 29, 2019 18:46
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HalloKitty posted:Yeah, I think they've decided where the bottom should be in flash prices... Sure gonna suck if I wait so long to upgrade from my i5-3550 (end of 2019 is when I'll probably build stuff) that ram and ssd prices start going back up.
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Apr 29, 2019 18:53
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So if you are worried, why not buy the ram and ssd now?
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May 2, 2019 21:03
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speaking of buying RAM now, Samsung discontinued B-die chip production and is going to replace them with A-die and M-die chips over the next few months. Not much is known about performance of the new modules but they're going to be available as 16 or 32Gbit chips (B-die is/was 8Gbit).
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May 6, 2019 11:14
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Nobody: Asrock: "hold my beer" quote:ASRock has been offering some really good small form factor designs on each generation of HEDT processors from Intel and AMD. They have the smallest X299 motherboard (X299-E-ITX AC) around and also the smallest X399 (X399M Taichi) motherboard. Now, ASRock Rack has released the MITX EPC621D4I-2M motherboard which is the smallest C621 chipset based motherboard. not mini-STX? smh, is Asrock even trying anymore?
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May 6, 2019 16:57
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God bless ASRock. It's beautiful.
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May 6, 2019 19:02
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Honestly the only thing it’s missing is a vacuum tube audio amp on-board
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May 6, 2019 20:57
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Paul MaudDib posted:Nobody: It's sad that stx seems to be mostly dead in the water. I have one stx comp, and it's nice for what I wanted it for - a small, energy efficient computer that was still fast. Intel NUCs aren't bad, but I like being able to swap out all the parts myself. Look at the size of that socket though, there's no way.
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May 8, 2019 09:10
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NewFatMike posted:God bless ASRock. It's beautiful. It's like 40% CPU socket by area, and the case is like 50% CPU cooler by volume. Truly doing god's work.
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May 8, 2019 11:08
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What's the intended use-case for that delightful oddity? I feel like any form factor a home user would stick it into, the sheer size of the cooling apparatus needed would mean they'd probably have the space for a larger case and motherboard anyway. I feel like that's something you could build some kind of custom rig where you'd have a rack full of those things, being fed by a big central water cooling system or something.
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May 8, 2019 17:40
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Farmer Crack-rear end posted:What's the intended use-case for that delightful oddity? I feel like any form factor a home user would stick it into, the sheer size of the cooling apparatus needed would mean they'd probably have the space for a larger case and motherboard anyway. Gamers wanting a luggable system for lan parties? Is that a market?
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May 8, 2019 18:56
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FunOne posted:Gamers wanting a luggable system for lan parties? Is that a market? Arguably there may be one coming up for VR backpacks.
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May 8, 2019 18:58
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Nobody is using a locked 28-core 2.8 GHz Xeon for VR backpacks or LAN parties. There's no sound or anything else either. If that is what you want, you'd buy a Z390 or X299 mITX board instead. The target market is white-box edge systems that need to be compute-heavy, I'd think. It is definitely a weird board because they don't really have the space for many PHYs or controllers, so it's pretty limited in its capabilities, as far as these boards go. You get dual NICs, dual NVMe, one SATA DOM for boot, and four SATA ports for storage. Without quad NICs or 10 GbE you probably aren't going to be a router, without 10 GbE you aren't going to be a NVMe fileserver, there's not a ton of expansion for SAS controllers so it doesn't make a good HDD fileserver, etc etc. And there's not a ton of expansion room unless you do a breakout riser. The focus of this board is definitely compute, I think. Not sure what the exact workload would be that fits those exact set of limitations though. Paul MaudDib fucked around with this message at 19:27 on May 8, 2019 |
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May 8, 2019 19:22
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Preparing for the day that CPU buttcoin mining is once again profitable?
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May 8, 2019 19:35
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Some rumors about new chipsets and CML floating around... 400 series for Comet Lake, 495 series for Icy Lake, LGA1200 socket, 10 core to have 125W TDP (heh)
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May 8, 2019 21:13
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I would expect that Intel launches in October like they did last year. That's probably about right for motherboards starting to get prepped. The money question is of course whether Comet Lake will work on previous boards. It's not surprising they are releasing an additional chipset for Comet Lake, they always release a new one so that you can go out and buy a board that just works instead of having to gently caress around with finding an older chip to flash it up. Does 400 mean that it's part of the 370/390 family, where the 495 is the "next" chip? edit: nope, if it's LGA1200 then it's not compatible. Intel's doing a one-off chipset, GG. (unless they do another gen on 14nm in which case  )
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May 8, 2019 21:21
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LGA1200 is just a vague rumor at this point but to be fair I do believe that a max overclocked 10 core could roast a few pins on the old socket. Intel also teased a new dual ringbus architecture for comet lake a long time ago, I wonder if this is actually happening and what the latency implications will be.
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May 8, 2019 21:33
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https://www.anandtech.com/show/14311/intel-process-technology-update-10nm-server-products-in-1h-2020-accelerated-7nm-in-2021 As a lot of people have theorized, looks like Intel is going to spend as little time as possible on 10nm. Combined with the earlier roadmap leaks, looks like we get Ice Lake on 10nm this year with Tiger Lake mobile next year. They are also planning on some type of server product on 10nm for next year, but their 7nm EUV process is now planned to ship in 2021. For desktop, it looks like a complete skip of 10nm. Comet Lake S coming next year, Rocket Lake in 2021 (both still 14nm), and then straight to 7nm.
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May 8, 2019 21:51
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Cygni posted:Comet Lake S coming next year, Rocket Lake in 2021 (both still 14nm) 
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May 8, 2019 21:54
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Here lies Larrabee, he never scored 
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May 8, 2019 22:12
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Wonder if they'll do a fire sale of the parts again, I would be tempted to get one to play with.
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May 8, 2019 23:04
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Some more data: https://www.anandtech.com/show/14312/intel-process-technology-roadmap-refined-nodes-specialized-technologies 
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May 9, 2019 01:19
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Cygni posted:Some more data: my brain really wants to read it as "reckless abandon continues"
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May 12, 2019 17:39
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Cygni posted:Some more data: You know how in old cartoons in the stereotypical business meeting there'd be this chart with a red line going upwards? I always wondered what those charts were about, I think this is the first time I've conclusively seen one IRL
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May 12, 2019 17:55
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"4x Reduction in design rules" the ongoing security flaws they're facing makes me wonder how that will play out
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May 13, 2019 15:15
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Bloody Antlers posted:"4x Reduction in design rules" the ongoing security flaws they're facing makes me wonder how that will play out "By simply accepting that this architecture is fundamentally flawed in a security sense, we decided to lean in and simply remove all the design rules we had been restricting ourselves with in attempts to mitigate security issues. The result, as you can see, is a massive reduction in red tape that will let us iterate more quickly on future nodes!"
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May 13, 2019 15:30
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Design rules have nothing to do with architectural design, they're about limitations on how you physically space things.
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May 13, 2019 15:31
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mewse posted:You know how in old cartoons in the stereotypical business meeting there'd be this chart with a red line going upwards? I always wondered what those charts were about, I think this is the first time I've conclusively seen one IRL Quite generous with the "only use 10nm for two cycles" pledge.
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May 13, 2019 17:00
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