Palladium posted:

i think he had an aneurysm when huawei and SMIC put out their 7nm SoC and moving on to 5nm now

BadOptics posted:

Lol that he'd post that and then this days later:

https://x.com/jordanschnyc/status/1582050775836295168?s=20

my bony fealty posted:

lol

5nm soon comrades

Doktor Avalanche posted:

yeah they had a slam dunk in front of them: entice russia into your sphere of influence, treat it like a partner, join it to yourself at the hip, and have it as a willing co-conspirator in kicking china in the nuts
but that would mean not being the "big dog", swinging your big stick around while imagining you're speaking softly when telling countries to go gently caress themselves
thank god they're so dumb and incompetent, thank god for american stupidity

my bony fealty posted:

so this is just fantasy fiction right

I know the US is trying its damndest to sanction and slow Chinese semiconductor progress but doesn't seem like it's working very well

my bony fealty posted:

so this is just fantasy fiction right

I know the US is trying its damndest to sanction and slow Chinese semiconductor progress but doesn't seem like it's working very well

Thorn Wishes Talon posted:

it is lol, the chinese are pretty far behind

https://thediplomat.com/2023/10/the-state-of-chinas-semiconductor-industry/

gradenko_2000 posted:

ChinaTalk: Litho World & Commerce: Lost in Translation?

quote:

The United States and its allies are engaged in a technology cold war against China to block semiconductor computing capabilities used in artificial intelligence and military applications. In recent years, the US Commerce Department has applied a series of export restrictions to achieve just that — and yet, just a few weeks ago, Huawei shocked the world with advanced chip technology that those restrictions were intended to prevent.

A nation’s computing capabilities are directly related to a complex printing process called semiconductor lithography. Semiconductor factories — called fabs — build microchips by printing layers upon silicon wafer substrates. Scanners — the machines used to print these layers — expose a master image of the circuit pattern onto the substrate until an entire wafer has a grid of patterned chips.

This article dives into the little-known tricks of the lithography trade to understand how the process works behind the scenes. Armed with this insider knowledge, we will then explore:

The technical misunderstandings in prior export regulations between Commerce Department officials and lithographers,

The circumventions that resulted from these misunderstandings,

And whether Commerce’s latest export controls resolved those past loopholes.

...

Generational improvements in scanners have enabled ever finer patterns to be printed on silicon wafers; the shorter the wavelengths, the more accurate the designs. The latest improvements came in the form of immersion scanners and EUV (extreme ultraviolet) scanners.

Immersion scanners use argon fluorine excimer lasers to produce light at a wavelength of 193 nanometers.

EUV scanners are yet more complex: they use a carbon dioxide drive laser to strike a tin droplet which then creates plasma-emitting light at a wavelength of 13.5 nanometers.

US national security leaders are concerned with China’s access to these latest two innovations.

...

Scanners pattern silicon wafers by printing layers of a design — and for decades, the printing process made only a single image per layer. But as step-wise improvements to immersion lithography reached their limits (and before EUV was in the game), chipmakers moved to multi-patterning lithography, a process whereby scanners combine two or more images to make a single layer.

The stacking of layers in a semiconductor device involves two complex verification processes: alignment and overlay.

Pattern alignment is performed by the scanner: it measures the position of a prior image and then exposes a new image upon it.

Overlay is performed by a separate metrology tool after the scanner has completed its work. This measures the final positioning error between the current image and the prior images in the device.

Single-machine overlay (SMO) is the simplest form of this verification. Here, two layers are exposed on the exact same machine to see what the positioning error is. (The error tolerance needed for working microchips is so precise that it’s on the order of single-digit nanometers.) Limiting the verification process to one machine removes the risk of error arising from transferring wafers from one machine to another.

In practice, though, fabs never operate in SMO mode because of logistical realities in high-volume production. Instead, fabs conduct pattern alignment and overlay through matched-machine overlay (MMO). Here, a set of scanners is matched, and a wafer can run through any combination in the matched set. MMO allows for far greater operation flexibility in a fab, but at the cost of nearly doubling the overlay error. Process engineers attempt to reduce the MMO error rate by reducing “runpath combinations” (the number of different machines a wafer runs through), but this strategy works only to a limited extent.

All modern overlay strategies rely on maximizing the accuracy verification (metrology) of both the scanner and overlay tools used to overlap the layers. But metrology is massively expensive: additional alignment measurements require more scanners. Likewise, if the overlay tool required additional metrology, the fab would need a larger fleet of tools to make up for the capacity shortfall. With an eight-figure price tag on these tools, it’s just not affordable to increase metrology indefinitely.

Another ​​important aspect of the litho process which can heavily influence overlay performance is rework. The scanner images a pattern into a temporary organic material called photoresist. This temporary image is then measured to see what the overlay error is; if it’s satisfactory, the image is permanently etched into the device — otherwise, the photoresist is removed, recoated, and reimaged with a dedicated set of corrections. This process always yields the best possible outcome because the exact positions of the pattern are known. In production, the goal is to minimize rework because, for example, if the rework rate were 30%, the fab would need 30% more scanners to make up for the capacity shortfall. In the same way a fab can’t just add metrology due to tool costs, they also can’t demand automatic rework.

To recap, there are three ways to improve overlay performance: reduced runpath combinations such as SMO, increased metrology, and rework. All of these methods are routinely used, but they are also used sparingly in production due to risk or cost reasons.

...

Back in 2019, as TSMC was first releasing their 7nm-node logic ICs, Commerce pressured the Netherlands to impose a ban on China for EUV scanners made by ASML. Its reasoning was that EUV enabled 7nm to be produced at volume scale; indeed, prior to 2019 there was speculation as to whether EUV was going to be ready for the 7nm node. Thus the first iteration of these devices relied on immersion lithography using multi-patterning.

The 7nm node required three to four passes by the scanner to imprint its pattern for a handful of critical layers in the device. That’s the highest number of multi-patterning passes ever attempted with immersion lithography — and a high number of lithography passes plays directly into the production challenge of applying MMO for the 7nm node, and was the rationale for the export rules on immersion scanners that came later (the October 2022 rules, as well as the Netherlands’ June 2023 rules). The introduction of EUV at this node reduced the number of layers needed, and it was under these assumptions that 7nm “at production scale” could be enabled only by EUV. Ultimately, the Netherlands capitulated to this pressure in the same year and banned all EUV scanner exports to China, effectively stopping them at the 10nm node.

Note that the EUV ban covered only logic devices: DRAM (which relies on other methods for each new chip generation) had a ways to go before it would need EUV; NAND Flash, meanwhile, relies on 3D stacking to scale, not shrinking the device geometry, meaning they will never need EUV.

...

In lithography land, you’ll often hear references to words like “resolution,” “half-pitch,” “critical dimension” (CD), or generics like “features” or “geometries.” These all refer to the size of the tiny circuit parts which are printed in each layer. Each microchip generation’s improvement in computational capability relies on shrinking the minimum resolution that can be printed, such that more electronic components can be included. Today’s chips pack an astounding 80 billion transistors into a single exposure field imaged by the scanner.

A scanner’s ability to print smaller geometries is controlled by two aspects of the optical system: the wavelength of light, and the size of the lens. The novel aspect of immersion lithography is that it uses an optical “trick” to make the photoresist think the lens is much bigger than it really is. In the 1800s, scientists figured out that putting water between a microscope lens and the specimen improved visibility. That same concept was used 150 years later for printing chips (hence the name “immersion lithography”).

The resolution of any imaging system with a lens can be defined by way of the Rayleigh criterion: Resolution = k1-factor * wavelength / lens-size.1 Put simply, k1 is a scalar, and it measures how blurry an image is. (In the case of an immersion scanner, the minimum k1 that can be used is 0.27, corresponding to a minimum resolution of 38 nanometers.)

The export rules cite the Rayleigh criterion and a specific value for the k1 scaling factor to define what the resolution of an immersion scanner is. That approach is the reverse of how a lithography engineer uses the formula: the minimum geometry (resolution) is fixed on the master pattern, meaning that engineers instead calculate the k1 scalar.

The export rules do the reverse, setting a k1 value that is not even close to 0.27, and then imposing by fiat a k1 value on what the resolution definition for scanners must be — which of course doesn’t represent the real resolution of any system.

Fast forward to October 7, 2022 — Commerce announced a new set of export rules aiming to contain China’s logic capabilities even further, and also attempting to contain memory device performance. The rules require companies to apply for licenses to export the following items to China, effectively cutting off Chinese firms’ access to these chips:

FINFet Logic of 14nm or less

DRAM of 18nm or less

NAND Flash of 128 layers or more

With respect to an immersion scanner: one regulation on resolution restricted the minimum geometry to 45 nanometers or less — and as we discussed above, an immersion scanner can print down to 38 nanometers. The catch is that Commerce inserted a definition for resolution using the Rayleigh criterion, incorrectly setting the k1 factor as 0.35 — meaning that, by their definition, an immersion scanner has a resolution of only 50 nanometers, and was thus not restricted by this rule.

In June 2023, and in coordination with the US Department of Commerce, the Netherlands imposed its own export ban on ASML’s scanners that improved upon what the US had filed. The Dutch rules are as follows:

SMO less than 1.5nm

Resolution less than 45nm @ k1 = 0.25



Armed with your short lesson in lithography, you’ll notice right off the bat how these rules also don’t relate to how a fab actually runs. The above table shows updated scanner bans and the corresponding nodes which they are used for. The SMO rule allows the 1980Di scanner, which was used for 10nm logic and 18nm DRAM. And there is no containment for Flash memory by way of any overlay rule. In other words, these rules define the resolution for an immersion scanner beyond what is actually possible. Although on paper that would imply all immersion scanners were banned, this rule was not enforced; these rules were instead interpreted as allowing the 1980Di tools to be exported, but blocking anything newer.

It’s clear these rules didn’t work as intended. Allowing Chinese firms to purchase 1980Di scanners doesn’t prevent their ability to produce 14nm logic chips. And as we found out this year, it doesn’t even prevent 7nm logic.

Remember how fabs don’t run in SMO mode, lest a tool goes down and halts production? Well, as it turns out, ASML’s immersion scanners are something of an energizer bunny. They enjoy north of 97% uptime, and can run for months at a time without intervention. But what happens if a tool goes down hard for a long period of time? The Dutch take this lithography business very seriously, and the exorbitant fee that’s paid for the service contract comes with some big benefits. In the event of any catastrophic tool crash, an army of engineers is dispatched within hours and operates on the machine with the choreographed speed and precision far exceeding an Indy 500 pit crew. In other words, the logistical risk of operating in SMO mode for a handful of problematic, multi-patterning layers may not be such a big deal after all.

Remember, SMO has nearly double the performance of the MMO that everyone else operates with. Geometry scaling with multi-patterning is a possibility, as long as the logistical issues are addressed. And recall in our litho lesson that maximizing metrology and automatic rework also improve overlay performance. Further, by slowing down the speed the scanner operates at and increasing the number of alignment measurements, you can play games with how the system works — for instance, to improve the overlay performance enabling multi-patterning at 7nm. Put another way: throwing money at the problem — buying more scanners and overlay tools — is also a solution.

Time will tell if Commerce is right or not about the rule stopping SMIC from producing 7nm “at volume scale.” But so far, allowing ASML’s 1980Di scanner to be sold to China doesn’t block 7nm in the least — and the jury is still out on another leap to 5nm. It’s a similar story with DRAM: nothing prevents those fabs from running with SMO (since they do multi-pattern differently than other fabs), and DRAM companies — like Micron, Samsung, SK hynix, and China’s ChangXin Memory Technologies (CXMT) — won’t need EUV for a number of nodes beyond 18nm DRAM, anyway. Meanwhile, Flash memory wasn’t contained at all: Flash companies — like China’s YMTC — can use any old immersion scanner they want, and nothing stops them from continuing to stack layers on top of each other to expand the memory capacity.

TL; DR - the Department of Commerce didn't understand lithography well enough to form a set of rules that would be effective in stopping Chinese lithography in the ways which they wanted it to be stopped, when combined with ASML wanting to help China because they are a big customer, and China having enough money and effort to throw at a problem to overcome inefficiencies forced upon them by the rules that did have a notable effect.

Thorn Wishes Talon posted:

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Danann posted:

https://twitter.com/witte_sergei/status/1737878324872175626

behold a powerpoint

Raskolnikov38 posted:

lol well that was optimistic wasn’t it

E: Lmao 235 tanks to expel the Russians from all four oblasts

my bony fealty posted:

so this is just fantasy fiction right

I know the US is trying its damndest to sanction and slow Chinese semiconductor progress but doesn't seem like it's working very well

Raskolnikov38 posted:

lol well that was optimistic wasn’t it

E: Lmao 235 tanks to expel the Russians from all four oblasts

Cerebral Bore posted:

the biggest trick the great satan ever pulled on the world was convincing them that it was competent

BadOptics posted:

BadOptics posted:

Lol that he'd post that and then this days later:

https://x.com/jordanschnyc/status/1582050775836295168?s=20

crepeface posted:

interesting article from 2019 about Huawei sanctions with a look back though mao-era development of chips, aircraft and tech: https://redsails.org/emergency-measures/

quote:

Full original title: “Emergency Measures”: The Mao-era computer development strategy illuminates the path forward for Huawei out of their difficult situation.

I first read this article in 2019. It was published immediately after sanctions on Huawei were announced, and it’s been stuck in my mind ever since. It was harsh and it was critical, but it focused on the path forward, and what was to be done. On the whole, the article has aged extremely well — the author’s recommendations largely match what has been implemented by the government. At the same time, the author would surely agree that Huawei and other domestic firms have far exceeded the expectations that we had of them in 2019 and 2020.

This article encapsulates what I deeply appreciate about Utopia [乌有之乡] and its writers: they’re never afraid to criticize, but they’re always focused on the way forward, and draw their inspiration from past successes and victories. There’s much to learn here for us.
— S. F.

some good mao quotes:

quote:

Under the technological blockade of the U.S. and the Soviet Union, China could only follow the development route of domestic independent design and production. It was just as Chairman Mao said: “Blockade us. Blockade us for eight or ten years and China’s problems will be solved.”

quote:

In 1965, Chairman Mao returned to Mt. Jinggang, and on 25 May had the following conversation with Zhang Pinghua and Wang Zhuochao:

Why do we take the household responsibility system so seriously? China is a large agricultural country. If the foundation of rural ownership changes, the industrial base of China’s collective economy will be shaken. Who would we sell the products of industry to? Industrial public ownership would also change one day, and the polarization between classes would accelerate. From the first day of imperialism’s existence, they have looked at China’s vast market as an “eat or be eaten” situation. Today in all areas they have the advantage over us. When they attack us from within and without, how can the Communist Party protect the interest of the people, workers, and peasants? How can we protect the development of our own industry and national defense? China is a large country, and a poor country. Will the imperialists really let China become rich and strong? What would they be able to hold over us then? Relying on the breath of others to live, our country will never be safe.

Their capitalism has developed for hundreds of years, it is more mature than socialism. But China cannot go down the capitalist road. China has a large population, many ethnic groups, a long history of feudalism, unequal development between regions, and in recent years, imperialist oppression made the peoples’ lives unbearable and divided. If we engage in capitalism in such conditions, we would only become the slaves of others. The imperialists have advantages in energy, capital, and many other areas. The Americans both cooperate with and exclude the capitalist countries of Western Europe — how could they let a backwards China develop independently and then surpass them? In the past, China could not take the capitalist road. Today, I still say China cannot go down the capitalist road. If we did, we would be sacrificing the fundamental interests of the working people, which is contrary to the mission of the Communist Party. Class and ethnic conflicts in our country would intensify, and if not resolved, would be used by the enemy.

speng31b posted:

BadOptics posted:

Look, if you've played any Wargame set in the 80's you know a NATO tank can defeat 6-8 inferior "turret tossing" Russian tanks.

Cao Ni Ma posted:

The dutch are the big litho guys and one year they were saying that china would never catch up and the next they were crying that china used human wave tactics to innovate in ways that they couldn't and is rapidly catching up, not only risking their exports to the chinese market but them becoming a deathblow dealing competitor. So like good capitalists they just let china buy their poo poo en masse and live for todays number, not tomorrows.

Cao Ni Ma posted:

The dutch are the big litho guys and one year they were saying that china would never catch up and the next they were crying that china used human wave tactics to innovate in ways that they couldn't and is rapidly catching up, not only risking their exports to the chinese market but them becoming a deathblow dealing competitor. So like good capitalists they just let china buy their poo poo en masse and live for todays number, not tomorrows.

Danann posted:

shot:
https://twitter.com/ThucydidesCA/status/1702462918313521312

chaser:
https://twitter.com/ThucydidesCA/status/1702468282551550336

Cerebral Bore posted:

no you see only the dutchman can figure out how to build this particular machine and nobody else, it's the inherent aryan superioritywindmills and wooden clogs that does it

Thorn Wishes Talon posted:

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quote:

Today we are disbursing to Ukraine the last 1.5 billion euros from our 18 billion euro support package for 2023.

We must find an agreement to continue to provide Ukraine with the support it needs to rebuild, rebuild and reform.

We stand by our neighbor, friend and future member.

Pistol_Pete posted:

A sobering, and grim reminder of the horrors that will follow from a Russian victory in Ukraine:

https://www.ft.com/content/a788b749-c94c-4d9e-99e4-47300b0c6ea8

mila kunis posted:

Isn't FT supposed to be the sober objective paper the people in power read, not the propaganda for pleb consumption

fizziester posted:

https://en.wikipedia.org/wiki/Artillery

fizziester posted:

https://en.wikipedia.org/wiki/Catholic_Church_in_Ukraine

fizziester posted:

https://en.wikipedia.org/wiki/Austria-Hungary

Austria-Hungary

fizziester posted:

https://en.wikipedia.org/wiki/Woman

Woman

mila kunis posted:

Isn't FT supposed to be the sober objective paper the people in power read, not the propaganda for pleb consumption

Pistol_Pete posted:

It's good for domestic news, especially economics and finance; it's much more wobbly on international news concerning rival powers to the West, where it tends to repeat the same propaganda as the rest of the media, just dressed up to look more sensible and grown-up.

Hatebag posted:

oh, come on! all that work slovenia and croatia did for destroying yuglslavia and they don't get to count as a real country??

Cerebral Bore posted:

going forward there's definitely going to be an ever growing tension between the true believer us lapdogs and more clear-eyed people who realize that supporting us hegemony is increasingly incompatible with defending national interests

of course, europe being europe, the people who are on the national interest side are mostly blood-gargling nazis

Cerebral Bore posted:

going forward there's definitely going to be an ever growing tension between the true believer us lapdogs and more clear-eyed people who realize that supporting us hegemony is increasingly incompatible with defending national interests

of course, europe being europe, the people who are on the national interest side are mostly blood-gargling nazis

Regarde Aduck posted:

starting to wonder if most EU bureaucrats aren't just US intelligence plants. I think they all just get approached early in their careers and then ultimately get their orders directly from one of the alphabets

as in a neoliberal system the only thing that matters is money, they simply pay them more than would normally get. It's that simple. That's the terrible beauty of a system without ethics.