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Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe
FPGA and microcontroller bit janitor checking in

lol, just lol if you don't janitor individual bits and clock cycles

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Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

eschaton posted:

how many gates would an FPGA reasonably need to support to emulate a Lisp Machine CPU?

like first-gen, the CADR/Lambda/TI Explorer

I'd say one of the larger Spartan 6s would be plenty. Buy the biggest FPGA that the Webpack supports (probably either the LX45 or the LX25).

The one thing that could get you is the memory - some of those LISP machines had upwards of a megabyte of RAM. Not a lot in the scheme of things, but more than a cheap FPGA will provide. So make sure you have some external memory.

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Bloody posted:

serious q are there any non horrible ways of input fuzzing with verilog testbenches

have you tried out MyHDL? It's a Python library that is designed for HDL generation - I wouldn't call it HLS or anything like that, but it's kind of like a weird mix between Python and Verilog development

they have pretty good support for the Verilog VPI, so any simulators that support it (Modelsim, Icarus, probably others) will work with MyHDL.

I've been messing around with using it to do unit-testing of my Verilog modules - write the module in Verilog and the testbench in MyHDL - then you get all of Python's unit-test functions and stuff.

I haven't used it for unit-testing production code yet, but I've screwed around with it some and I got a testbench up and running for a counter module :woop:

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Bloody posted:

its true. instead of using some of the new for loop constructs sysV allows, i'm writing a c# program to autogen some spaghetti code.

I might be kind of retarded but what for-loop construct does sysV have that V2001 doesnt? I use for-loops in generate statements and function calls all the time and it synthesizes ok with xst

Poopernickel fucked around with this message at 09:05 on Feb 25, 2015

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe
Because im the biggest idiot on the planet, i took on the task of makefile-automating my builds with Xilinx ISE.

Easy to do terribly, fucken hard as poo poo to do right

Stupid pointless things done thus far:
Wrote a dependency generator for ISE projects
Wrote a dependency generator for EDK projects
Figured out how to generate coregens on the command line to avoid putting ngcs in the repo
Figured out how to conditionally set ISE parameters from the command line
Killed self literally, I am a ghost now

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Bloody posted:

i don't know what these things mean

asic nerdspeak for chip-fab process variance

it puts the P in PVT

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

eschaton posted:

if i were to install the Xilinx tools on Linux, would that be sufficient for new development if I just did everything through makefiles? or does the tooling really insist on an IDE-generated project file and so on, even for command-line builds?

kind of like the IDE that I work on does

I haven't had the chance to play with Vivado yet, but if you're on 6-series FPGAs (like the Spartan 6), then you're stuck with Xilinx ISE.

It's not too hard to do a pure non-IDE Makefile-based approach for simplish designs, and maybe even a coregen or two - once you start to throw EDK in the mix, it turns into waaayyy more of a clusterfuck trying to do the whole thing with a non-project flow.

of course I just finished automating an ISE-based flow with Make (using xtclsh and xps -nw), and it was a pretty rough ride too so I dunno

Project-based gotchas that I had to deal with:
1) Out of the box, some of the GUI tools are broken on other linuxes than RHEL6/Centos 6 - I did mine on Fedora, and I had to dick around with some library stuff to get the tools running. Some of the obscure GUI stuff still doesn't work (FPGAEditor, I'm looking at you)
2) It was a pain in the rear end to do the dependency-tracking in Make - I had to write python helper scripts to generate .d files
3) Some of the compilation steps are fundamentally grouped-output kinds of things, where one process has a bunch of dependencies and produces a pile of files. Handling that properly in Make is surprisingly hard to do robustly
4) If you're doing a project-based flow and controlling the tools with xtclsh or xps -nw, the tools sometimes want to change the timestamps on their project files even if nothing changes. My makefiles set the project files to read-only before calling the tools, and change them back afterwards


edit: the silver lining is that the Linux tools really run a lot faster than their Windows equivalents

Poopernickel fucked around with this message at 09:04 on Mar 2, 2015

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe
on the bright side I learned a shitload about a bunch of make's obscure features so :shepface:

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Bloody posted:

im back to this problem (lol)

i have an fpga dev board with an ulpi chip on it but i have no ulpi ip and i cant find any and im reading the spec and it sounds tedious as gently caress why isnt this easier

said dev board also has pci-e 1x and i think ip for it but at some point i want to hook this to a laptop and said laptop probably doesnt have expressport and i know i dont have an adapter and we could buy all these things but i suspect usb would just be preferable

it also has some gigE phy but it doesnt seem to have a data sheet and i think sgmii is just a different flavor of nightmare from ulpi so w/e

with gigE you at least don't need to worry about usb drivers or any poo poo - do teh gigz

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe
octal numbers

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

movax posted:

vivado / xilinx still doesn't understand the concept of people wanting to version control stuff though.

why the gently caress do i have to hand-write my own tcl scripts to run the entire build flow because you fucks are unwilling to jump into the 21st century and embrace source control :mad:

This so hard

fucken drives me UP THE WALL

i'm nuts-deep into automating my group's vivado flow and getting it to play nicely with source-control - holy poo poo what a colossal pain in the rear end. ISE, for all of its quirks and general shittiness, somehow easier to source-control than Vivado.

also just found out that data2mem Doesn't. Even. Work. For an Artix-7 part. WHAT THE gently caress

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

movax posted:

don't even get me started on trying to version control the shitshow that's version controlling the export process over to their sdk tool as well (an eclipse-based system)

at least eclipse has some user community that's figured out ways to deal with that special brand of bullshit

I literally just got that flow working for me today - do you have any questions / are you stuck?

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

movax posted:

mostly i've got some simple parameterized modules where i want to barf if the idiot user tries to make width 0 registers or similar things

ovm sounds like something that'd be cool to start using though -- our stuff is so simple right now / so tiny (igloo nano fpgas) that it's not required, but i want to learn more about it

You can use $finish() with Xilinx's tools to tell the synthesizer to quit. It probably works with the other guys too.

Something like:

code:
initial if (WIDTH<1) begin
    $display("Error! Width must be at least 1.");
    $finish;
end

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

JawnV6 posted:

the synthesizer looks at those directives? thought they were simulation-only

I've had hdl compilations that took 24+ hours, so the difference in compile time and cycle 1 can be huge

Yep! I put compile-time checks on all my parameters, especially for ones where I'm doing something clock-related like a DCM wrapper with parameterized frequency.

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Barnyard Protein posted:

yeah dsp is awesome. what area of dsp are you interested in? i'm trying to learn it on my own, focusing on fast algorithm implementation. i wish i were in a position to go back to grad school full time, i'd do dsp.

e: this is the book i'm working through right now http://www.amazon.com/Fast-Algorithms-Digital-Signal-Processing/dp/0201101556. its focusing on fast convolution algorithms, and its awesome. however its 31 years old and i have no clue if the info is even relevant any more. it'd be nice to have a set of experts at my disposal that are obligated to entertain my questions and ideas

Tangent bump: This is the best book on DSP I have literally ever read - I refer back to it almost every time I need to implement something tricky:
http://www.amazon.com/Understanding-Digital-Signal-Processing-Edition/dp/0137027419

What's great about it is that the book isn't academic at all. It targets the working engineer (me) who's way too lazy to digest a bunch of math just to get to a conclusion (also me)

Poopernickel fucked around with this message at 20:47 on Feb 21, 2016

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Sagebrush posted:

pics are garbage for grognards stuck in 1995

lol, just lol if your processor's compiler costs money for a non-poo poo version

GCC fo lyfe

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Microchip's Actual Website posted:



Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe
The latest in mergergate - Qualcomm is apparently in talks to buy Xilinx

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe
decoupling is actually a super-complicated topic - more uFs (uF uF uF) aren't always better

remember: it's not the size of the capacitor, it's how you gently caress

I'd plop down a 0.1uF in the smallest package you're comfortable with, right next to each power pin. if you need ~precise~ measurements, maybe add a 1uF and an 0.01uF in parallel

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe
in tyool 2017 my employer is going into production on a brand new product, designs started from scratch in 2015

what did they pick to drive their analog knobs, leds, and buttons? an attiny88 featuring:
- 512 bytes of ram
- SPI controller with no FIFO and a shared data register between transmit and receive
- no UART
- obsolete toolchain
- 8MHz clock speed
- two PWM channels (and the board has 4 user-facing LEDs)
- saves maybe 30 cents versus an equivalent m0, on a product that will cost several hundreds of dollars

also none of the LEDs are on either of the PWM pins

wish I had a hot tub time machine so I could go back and bunch that designer right in the dick

Poopernickel fucked around with this message at 13:25 on May 23, 2017

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

movax posted:

hahahahahaha

was this picked because someone prototyped with some kind of ~~maker~~ product?

also lol at saving 30 cents for something that isn't gonna (I assume) break 10K units -- how many hours is $3K saved?

probably a safe bet on both

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Sagebrush posted:

spam spam spam


i did this and it's fuckin' great



100nF capacitor reads as 72-84nF when repeatedly tested. badass

i know it's p basic stuff from an electronics standpoint but having the scope has been like...such a huge change in what I can do. like my old analog scope still does what it does, but it's a lot bigger pain for stuff like this -- I'd have to build an oscillator and make measurements on the graticule and blah blah blah. i've been screwing around with electronics since i was 7 years old at science camp, and over the years there have been these moments when it was like a huge step forwards in capability, another level opening up -- when i got my first decent multimeter (age 12), when i got a good soldering station (age 16), when i built my first arduino from a kit (age 20), and this is another one. i'm super stoked by all that this tool has suddenly enabled.

For super heap big fun, try measuring your capacitance as a function of bias voltage :science:

for some kinds of caps, you can get down below half of the nominal capacitance as you get close to the rated voltage of the part.

a 2.2uF/4V Y5V capacitor? On a 3.3V rail it's probably more like 1uF

Poopernickel fucked around with this message at 17:38 on Jun 4, 2017

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Sagebrush posted:

i assume that's cause of leakage or tunneling or something as it gets closer to the breakdown voltage of the dielectric?

couldn't tell you why - I love circuit design but have approximately 0% interest in the physics/chemistry aspects

I do love how p. much all actual capacitors are drastically different than the 'ideal' capacitor, in surprising ways - voltage-dependance capacitance and temperature-dependent capacitance are just the tip of the fuckin iceberg

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe
just got tasked with enabling LED PWM support on the board I'm working with.

this board has been through 6 revisions over the course of 2 full years. And it's basically just a poo poo microcontroller, a few knobs, and a couple of LEDs.

turns out that even on the current revision, I can't use the microcontroller PWM because the only way to actually make the LED driver circuit work is to set the pin to an input and toggle the pullup resistor on and off.

JESUE loving CHRIST :suicide:

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

hobbesmaster posted:

can you even toggle the pullup that fast?

probably not

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe
for extra lols, the LED brightness winds up depending on the value of the pullup (which goes from 50% to 200% of nominal) and also the transistor gain (which can be anywhere from 40 to 300)

if the transistor gain is high enough, the circuit doesn't work at all

Poopernickel fucked around with this message at 19:27 on Jul 8, 2017

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe
only reason I can come up with for that bullshit is that they're driving it from a 3.3V micro and have to high-side switch because the LED in question is a red/green common cathode LED (it's still garbage in the worst way)

also, it's a 2-channel common-cathode led (red/green) so of course they want ~*CoLoRs*~ for marketing reasons

the most ironic part is that once they dial in their magic PWM value which I'll have to provide manually with timer interrupts, the colors will change wildly from unit to unit because of this poo poo circuit

"constant-current source? what's that and why would we ever need it lol"

Poopernickel fucked around with this message at 20:07 on Jul 8, 2017

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Sagebrush posted:

what were they even going for here?

if it's something like a 5mm LED you can do it literally as GPIO -> resistor -> LED -> ground

why is there one transistor driving the LED and another transistor to drive that transistor (also is this a darlington pair?)? i guess i could see that being a thing if the LED is too powerful for the GPIO directly, and you picked some terrible drive transistor that needs more current to saturate than the microcontroller can provide?

mosfets or bust

it's a bog-standard 5mm red/green comon cathode LED, driving it with ~15mA

all of these BJTs are one-per-package SOT-23s because why place one component when you could place two instead

the circuit would actually work(ish) if there was a limiting resistor between the two transistors, but as it is Q2's emitter-base current starves the LED current



Poopernickel fucked around with this message at 20:14 on Jul 8, 2017

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

longview posted:

that's pretty terrible, but you gotta admire that dedication to saving $0.001 by not putting in an extra resistor to make it work

it's not like a SN74LVC2T45 is that expensive

i would bet my left nut that it was an accident which stayed in the design through 6 revisions

nobody ever noticed because the last firmware engineer on this project didn't know that he was toggling the pullup resistor rather than the output

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

hobbesmaster posted:

i was about to ask how but then I realized the registers are probably separated by a letter or something

it's the direction register that makes the difference - On the Attiny88 and friends, the 'value' register controls the pullup resistor if the pin is an input

and it's an input by default unless you set the pin to an output

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Sapozhnik posted:

why does anybody use atmel for anything

it was an iffy choice even before microchip bought them out and jacked up all the prices 500%

like it's not a bad 8-bit architecture by any means, it's just that we live in the year 2017 and cost-competitive 32-bit microcontrollers which can be targeted by the same compilers that see massive use for desktop and server applications are things that exist

ikr

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Sagebrush posted:

they do the job for a lot of dumb little things and unlike PIC their toolchain isn't garbage

this, and also msp430's toolchain is pretty good too

but in tyool 2017, there are m0+'s on the market that are on-par power-consumption wise, can compute a lot more, and are even cheaper sometimes

Poopernickel fucked around with this message at 23:42 on Jul 8, 2017

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

ratbert90 posted:

I was thinking about using a sha256 authentication chip from them. Seems cheap and would be nice for storing a private key yes?

Is there another company/chip I should look at?

Edit:
Something like this: http://www.microchip.com/wwwproducts/en/ATSHA204A#buy

50c~ per unit seems ok.

atmel is fine for that stuff, I think he meant don't gently caress wit no AVR when you can use an m0 instead

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Sagebrush posted:

well, it's running on a cortex-m4 and i'm operating only on uint32_ts. using the mask to ensure safety for signed types makes sense. is it one cycle slower to do that, though?

good to know that for this case it should work either way, though. that's what it seemed like but wanted to be sure.

on a related note, is this the right practice?

code:

void main() {
  uint32_t boobs;
  byte poop = byte foo(boobs>>24);
}

byte foo (byte bar) {
  return bar;
}

the function wants a byte, but i'm giving it a uint32 and shifting to recover the MSB. what is happening behind the scenes? is there a hidden internal conversion from uint32_t to byte? does it just select the last 8 bits of boobs after the shift? it *seems* to do what it's supposed to, but having not read the C reference, i'm unsure.

similarly, if i passed a pointer to boobs, would that also recover the MSB because it just reads the first 8 bits from that location?

I'm gonna blow your mind with this poo poo:
https://godbolt.org/

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

Malcolm XML posted:

What's the best PCB design software for idiot hell fuckers like me

kicad if ya poor, altium if ya not

i'm poor and I use kicad - it's worked for me!

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe
is ST's toolchain better than the NXP kinetis line?

because hoooly poo poo it was a colossal pain to figure out how to use NXP's peripheral configurator to set up my PLLs, and the resulting code wouldn't even compile

Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

hobbesmaster posted:

just use keil and cmsis

i'm a poor, not gonna drop $$ for keil

plus, my open sources :qq:

as for cmsis, how do i get started with that shiat? is it easier/better than sperging over the processor guide and writing my own drivers for stuff?

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Poopernickel
Oct 28, 2005

electricity bad
Fun Shoe

qirex posted:

I saw this on an audiophile website and decided more people needed to see it
this interview was conducted to promote an $80,000 cable

i guess at that price you only need to sell one a month to book 1M in revenue

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