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Barnyard Protein posted:yeah you're in the right place imo. i'm surprised to see 2.5ns resolution with an off-the-shelf FPGA board. i would have suspected that you'd need a special pcb layout to make sure the lengths are correct and the impedances matched. what kind of analog front end are you using? off the shelf its more like 20ns resolution, but these two guys got it down around 10ns with custom firmware and an external clock, and the board itself should be able to go up to ~400Mhz which they expect to get them down to 2.5ns. really even the 10ns is good enough - in our current setup we sample at a max of 84Mhz and, we already pack in a couple ns to account for jitter when we decide if two counts are actually coincident or not the thing we are replacing is exactly what you described, a custom pcb layout to ensure correct lengths and impedances, I have no electronic engineering background so the workings of it are a mystery to me, but as I understand it, the custom hardware decides if something is a coincidence or not by stringing together a shitload of AND gates, and an older FPGA just provides the clock. http://www.trincoll.edu/~dbrannin/Coincidence%20Counting/CoincidenceHome.htm the thing I am building doesn't do any of the deciding itself, it just records events from detectors (single-photon avalanche detectors) and we do all the coincidence-deciding in labview. apparently the team I am studying with attempted this a few years ago but the FPGAs werent fast enough, so they settled on the custom hardware solution. http://www.nist.gov/pml/div684/grp03/upload/Stats.pdf
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Jul 26, 2015 02:03
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I'm wincing just imagining debugging your hardware
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Jul 26, 2015 08:17
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too many tiny nanoseconds
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Jul 26, 2015 08:44
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guessing they're using ECL for the core logic then? i'd imagine standard TTL would be too jittery for that
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Jul 26, 2015 10:29
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hobbesmaster posted:I'm wincing just imagining debugging your hardware we basically don't debug ever at all for that reason. it goes like this, build CCM, test all the channels with a feedback loop, if they pass, start using it. then a few months later "oh channel 4 isn't counting correctly, time to build a new CCM." and since you have to order the custom PCBs like, 50 at a time, we have just stacks of them in various stages of assembly the previous iteration was even worse, NIM crates stuffed with TACs and other esoteric poo poo that talked to a legacy PCI board from national instruments that is only supported in windows XP longview posted:guessing they're using ECL for the core logic then? i'd imagine standard TTL would be too jittery for that honestly I don't even know enough to answer that question, here is the FPGA family we plan to use, NIST specifies the xylo-EM: http://www.knjn.com/FPGA-FX2.html
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Jul 26, 2015 13:01
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Bloody posted:pyf terrible datasheets working on bringing up some lcd panels with cap touch overlays in linux. our ee guys got a bunch from a bunch of different suppliers and sent them over with some datasheets. the best is one that just uses an atmel maxtouch. the worst are the ones that have no bookmarks in the pdf, just page numbers; have incredibly blurry scans of all timing diagrams; and the one that takes the cake is the one that gives a register layout for the cap touch controller and a linux driver that doesn't match the layout or even the part name, and googling finds another prerelease datasheet for the same part that doesn't match either of them.
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Jul 26, 2015 14:44
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Hesh Ballantine posted:the thing I am building doesn't do any of the deciding itself, it just records events from detectors (single-photon avalanche detectors) and we do all the coincidence-deciding in labview. apparently the team I am studying with attempted this a few years ago but the FPGAs werent fast enough, so they settled on the custom hardware solution. nah they just didn't know how to do it idk about altera fpgas, but i'd expect they have an equivalent to this. since 2009 even the cheap xilinx fpga family (spartan 6) has had iob structures which permit you to: 1. delay an input signal by a variable, programmable amount with a resolution on the order of tens of picoseconds 2. sample the input signal (after it's run through the delay line) at very high clock speeds but deserialize it down to a slower clock rates at a wider bus width than 1 bit, e.g. 4:1 or 8:1 so even with an ancient spartan 6 that didn't support more than 4:1 deserialize it should've been possible to sample at 500 MHz (2ns) and run coincidence detection logic at 125 MHz, and if you needed to compensate for mismatched delay in signal paths you could do that too. according to those pdfs you linked the detector pulses are quite long so sampling them at a high rate should be enough to do everything you want, no need for all that external circuitry doing pulse shortening and other stuff with 74F logic etc also cringing at all the labview, but that's to be expected with academic laboratory work i guess BobHoward fucked around with this message at 23:49 on Jul 26, 2015 |
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Jul 26, 2015 23:42
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c electron s: i want a scope
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Jul 28, 2015 04:39
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a scope, a dece iron, a microscope, and a bench supply
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Jul 28, 2015 04:39
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Bloody posted:a scope, a dece iron, a microscope, and a bench supply
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Jul 28, 2015 04:48
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i have them at work but i want my own for idiot spare timing
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Jul 28, 2015 04:49
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looks like you could have a surprisingly decent setup for less than a grand
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Jul 28, 2015 04:50
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BobHoward posted:nah they just didn't know how to do it I think the capability you are describing came a year or two after the custom solution was designed, they published the paper on it in early 2009 so they must've started designing at least a year prior. that said, as you pointed out it's an academic lab and none of us are EEs, trust physicists to find the most convoluted solution possible
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Jul 28, 2015 12:27
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Hesh Ballantine posted:I think the capability you are describing came a year or two after the custom solution was designed, they published the paper on it in early 2009 so they must've started designing at least a year prior. at my university we had some cross-discipline cooperation. EE students would help the physics/chemistry department with instrumentation. perhaps you could get a more reliable HW setup for free* and give someone a master's thesis topic at the same time. i don't know the details of your role in the project so maybe doing what i suggested would take work off your plate that you wanted to do. being able to setup your own instrumentation must be a valuable skill for a physicist to have, but it'd be a shame to spend all your time being a FPGA janitor when what you really want to do is jerk off to quarks and bosons.
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Jul 28, 2015 15:32
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yeah this sounds like a thing you should be able to get either ee seniors or masters students to do for you
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Jul 28, 2015 15:52
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their solutions will still be garbage but so's your's and at least it's garbage you won't have to spend time creating 
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Jul 28, 2015 15:52
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Bloody posted:their solutions will still be garbage but so's your's and at least it's garbage you won't have to spend time creating Don't post excerpts from my collection of lifehacks
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Jul 28, 2015 17:14
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Hesh Ballantine posted:I think the capability you are describing came a year or two after the custom solution was designed, they published the paper on it in early 2009 so they must've started designing at least a year prior. ah yeah if it was that long ago might have required a more expensive part or w/e i actually work at a place where we ees are janitoring a system for scientists of a flavor even less likely to know any ee than physicists and tbh it's a blast, together we are making something beautiful
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Jul 28, 2015 18:24
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Bloody posted:a scope, a dece iron, a microscope, and a bench supply do it
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Jul 28, 2015 18:36
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Barnyard Protein posted:at my university we had some cross-discipline cooperation. EE students would help the physics/chemistry department with instrumentation. perhaps you could get a more reliable HW setup for free* and give someone a master's thesis topic at the same time. i don't know the details of your role in the project so maybe doing what i suggested would take work off your plate that you wanted to do. being able to setup your own instrumentation must be a valuable skill for a physicist to have, but it'd be a shame to spend all your time being a FPGA janitor when what you really want to do is jerk off to quarks and bosons. well that's the thing, I don't mind janitoring in service of a good cause, especially since I dont have the mathematical chops to circlejerk with the big kids at the phd level, and yes experimentalists often require these skills. also theorists need people that they share a common language with to make the computers go beep instead of boop the newest NIST version of the tabletop CCM does away with all the custom hardware and is actually rather elegant, we don't even have to care so much about the SPAD pulse duration because it just counts the leading edge of the pulses in real time. and yeah, building this is going to be my senior exercise so as I see it its a painless and easy way to finish out my BS BobHoward posted:ah yeah if it was that long ago might have required a more expensive part or w/e that sounds fun as hell, and is the sort of "interlocutor" position I would like to find myself in. ultimately I would like to do computer-y stuff for observatories (I'm applying to masters in astronomy programs this year) and just be part of a team working on something worthwhile hell I would even do a lab coordinator's job in academia, I get a ton of joy out of all the classical introductory experiments like cathode ray deflection
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Jul 28, 2015 19:21
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Mido posted:do it I need a desk that doesn't suck rear end first  right now it'd all sit on the ground
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Jul 28, 2015 19:27
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BobHoward posted:ah yeah if it was that long ago might have required a more expensive part or w/e sounds like more fun than my first job labview janitoring for instrumented mouse cages
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Jul 29, 2015 11:42
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Bloody posted:I need a desk that doesn't suck rear end first previous desk was a $50, 8x3 foot folding table from a used office supply place current desk is plain a blonde wood dining room table from IKEA with similar surface area both were very needs suiting and provide lots of work area (my old desk is where my old computers live now)
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Jul 30, 2015 09:01
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1 - buy plywood, 2x4s, wood screws, lag screws. 2 - build desk, screw to studs in wall 3 - never be home to use it
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Jul 30, 2015 12:32
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i got number 3 down
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Jul 30, 2015 17:08
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Bloody posted:you will be pleased to know that i have solved the problem in the op with a cypress fx3. the garbage i just banged together with eval boards was pushing 88 mbits on usb2 without breaking a sweat. loving owns. lol their driver stack is a burning pile of garbage 
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Aug 3, 2015 14:19
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Bloody posted:lol their driver stack is a burning pile of garbage is there any driver stack that isn't, other than IOKit?
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Aug 4, 2015 02:14
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eschaton posted:is there any driver stack that isn't, other than IOKit? i have not worked with many, but presumably they are all garbage.
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Aug 4, 2015 02:53
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like i have a handle for the device, the correct ioctl, and deviceIoControl calls aren't erroring, but the device is doing... nothing? but then i run their sample code and it does stuff? but then i try to compile their sample code and lol 400 errors? it would be a dead simple interface if it worked
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Aug 4, 2015 02:54
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Bloody posted:then i try to compile their sample code and lol
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Aug 4, 2015 02:56
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Try using WinUSB perhaps?
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Aug 4, 2015 04:04
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Yeah currently pursuing that. looks like visual Studio 2015 might not have a corresponding wdk yet though lol
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Aug 4, 2015 20:12
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JawnV6 posted:i have a genuine, burning hatred for tutorials that act like simulation-only constructs are Good and the synthesizable subset is some wacky restriction that a Good Designer wouldn't sully themselves with i work in validation so i don't care about synthesizability at all, generally.
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Aug 5, 2015 02:22
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hey thread. question: i have been wanting to get an fpga and start a github with all the poo poo i make it do but i have been too lazy to fpga shop. what is a good one to get that i can do things on for like $1000? where do you even find that out? are there toolchains i can use on my mac?
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Aug 5, 2015 02:22
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kwinkles posted:hey thread. question: i have been wanting to get an fpga and start a github with all the poo poo i make it do but i have been too lazy to fpga shop. what is a good one to get that i can do things on for like $1000? where do you even find that out? are there toolchains i can use on my mac? sure, you can get fpga dev boards for a hundred or two. only badass stuff will be $1k or more. the tools are even typically free for home/hobby use. (and also terrible) the tools won't run on OS X, but you can run them in Windows using a VM or Boot Camp, or on Linux. the general workflow that's been explained to me is: create project structure in Windows tools since often it's the only way to wire up all the dependencies, IP blocks, and so on, then you can actually do editing on your Mac and do batch builds on Linux.
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Aug 5, 2015 03:21
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oh, you could also play guinea pig and see whether the windows tools work under wine, crossover, etc.
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Aug 5, 2015 03:44
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kwinkles posted:i work in validation so i don't care about synthesizability at all, generally. http://www.asic-world.com/verilog/first1.html
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Aug 5, 2015 15:52
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kwinkles posted:i have been wanting to get an fpga oh wow, look who suddenly cares about synthesizability
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Aug 5, 2015 15:53
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JawnV6 posted:oh wow, look who suddenly cares about synthesizability only for fun 
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Aug 5, 2015 16:36
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eschaton posted:oh, you could also play guinea pig and see whether the windows tools work under wine, crossover, etc. ram and hard disk space is practically free, just have a VM for every crazy tool chain you use
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Aug 5, 2015 16:39
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