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Lightbulb Out
Apr 28, 2006

slack jawed yokel

amd processors are slow

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Truga
May 4, 2014
Lipstick Apathy

bulldozer arch

cinci zoo sniper
Mar 15, 2013




feh

30 TO 50 FERAL HOG
Mar 2, 2005





Lightbulb Out posted:

amd processors are slow

Heavy_D
Feb 16, 2002

"rararararara" contains the meaning of everything, kept in simple rectangular structures

Subjunctive posted:

the SEC form 4 says that the transaction was under a 10b5-1 pre-determined trading plan that was already filed. IIRC they have to be filed 6 months before they take effect, so going from the form 4 he specified the sale back in April. (likely to coincide with his option package vesting.)

all CxO/VPs I know trade under a 10b5-1 plan because they always have MNP information and otherwise couldn’t trade at all

while i'm sure the intel CEOs would never do this, the loophole of always filing a 10b5-1, and then cancelling the scheduled trade whenever your insider information indicates you'll profit by doing so, must surely qualify as a security (and exchange) fuckup

Kuvo
Oct 27, 2008

Blame it on the misfortune of your bark!
Fun Shoe

Wiggly Wayne DDS posted:

The Ultimate Apollo Guidance Computer Talk by Michael Steil and Christian Hessmann (61:42)
- another in the ultimate series - fast and dense talk. 60m to learn as much as possible about the apollo guidance computer. must watch imo, no q&a.

couple pages late but this talk is real good

Diva Cupcake
Aug 15, 2005

https://twitter.com/rhhackett/status/948666025066811392

anthonypants
May 6, 2007

by Nyc_Tattoo
Dinosaur Gum
https://twitter.com/pr0spector88/status/763715530381557761

30 TO 50 FERAL HOG
Mar 2, 2005



oh also i dont know if anyone remembers this from blackhat

https://www.youtube.com/watch?v=KrksBdWcZgQ

edit: nm it only hit 1 proc

30 TO 50 FERAL HOG fucked around with this message at 23:16 on Jan 3, 2018

Lain Iwakura
Aug 5, 2004

The body exists only to verify one's own existence.

Taco Defender
https://spectreattack.com/favicon.ico
https://meltdownattack.com/favicon.ico

You're seeing the logos here first, folks.

spankmeister
Jun 15, 2008






Bluh

spankmeister
Jun 15, 2008






So tired of these branded bugs. I don't even care anymore.

Lain Iwakura
Aug 5, 2004

The body exists only to verify one's own existence.

Taco Defender
i like how this affects even pentiums from 1995 that had the fdiv bug

mrmcd
Feb 22, 2003

Pictured: The only good cop (a fictional one).

https://security.googleblog.com/2018/01/todays-cpu-vulnerability-what-you-need.html

apseudonym
Feb 25, 2011

https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html

Lain Iwakura
Aug 5, 2004

The body exists only to verify one's own existence.

Taco Defender
https://forums.aws.amazon.com/thread.jspa?threadID=269858

Truga
May 4, 2014
Lipstick Apathy

5

Thanks Ants
May 21, 2004

#essereFerrari


Main Paineframe
Oct 27, 2010

:discourse:

Celexi
Nov 25, 2006

Slava Ukraini!
10 years later amd makes a comeback

Lain Iwakura
Aug 5, 2004

The body exists only to verify one's own existence.

Taco Defender
https://twitter.com/KateLibc/status/948692333607862273

Arcsech
Aug 5, 2008
google says amd is vulnerable as well, and also arm: https://security.googleblog.com/2018/01/todays-cpu-vulnerability-what-you-need.html?m=1

quote:

These vulnerabilities affect many CPUs, including those from AMD, ARM, and Intel, as well as the devices and operating systems running them.

rip all modern cpus, i guess

e: project zero blog confirms: https://googleprojectzero.blogspot.co.uk/2018/01/reading-privileged-memory-with-side.html

e2: looks like amd is less vulnerable at least?

Arcsech fucked around with this message at 00:11 on Jan 4, 2018

Trabisnikof
Dec 24, 2005

side channel timing attacks are loving cool

Linguica
Jul 13, 2000
You're already dead

so for spectre to work you have to feed the cpu a bunch of carefully crafted commands to train the branch prediction to react a certain way and then exploit the way the branch predictor is trained to feed a different carefully crafted command to have it speculatively access memory it shouldn't be able to access. thats some wizard poo poo

Jabor
Jul 16, 2010

#1 Loser at SpaceChem
I guess if you nuked the branch predictor state across security boundaries that would mitigate it? Perhaps make it exportable and importable and let the os kernel switch it out along with the rest of the thread state.

So there's probably a reasonable way to design an architecture that still gets the benefits of speculative execution without having it leak information.

mrmcd
Feb 22, 2003

Pictured: The only good cop (a fictional one).

Linguica posted:

so for spectre to work you have to feed the cpu a bunch of carefully crafted commands to train the branch prediction to react a certain way and then exploit the way the branch predictor is trained to feed a different carefully crafted command to have it speculatively access memory it shouldn't be able to access. thats some wizard poo poo

Yeah. Reading between the lines a bit, I get a sense of "we didn't bother to reverse engineer AMDs prediction engine because it was hard to do once and seriously who buys AMD. Maybe you'd like to take a crack at it though?"

So the re: Is AMD vuln to cross VM kernel memory leaks is "Maybe... Stay tuned!"

anthonypants
May 6, 2007

by Nyc_Tattoo
Dinosaur Gum

mrmcd posted:

Yeah. Reading between the lines a bit, I get a sense of "we didn't bother to reverse engineer AMDs prediction engine because it was hard to do once and seriously who buys AMD. Maybe you'd like to take a crack at it though?"

So the re: Is AMD vuln to cross VM kernel memory leaks is "Maybe... Stay tuned!"
reading the actual lines a bit i get a sense of "A PoC that demonstrates the basic principles behind variant 1 in userspace on the tested Intel Haswell Xeon CPU, the AMD FX CPU, the AMD PRO CPU and an ARM Cortex A57."

Malcolm XML
Aug 8, 2009

I always knew it would end like this.

Linguica posted:

so for spectre to work you have to feed the cpu a bunch of carefully crafted commands to train the branch prediction to react a certain way and then exploit the way the branch predictor is trained to feed a different carefully crafted command to have it speculatively access memory it shouldn't be able to access. thats some wizard poo poo

in retrospect it's obvious that it's a side channel


but it required some true wizardry to uncover. this is gonna be a legendary paper

this is basically the end-game for HW being designed w/o SW security input

Jabor posted:

I guess if you nuked the branch predictor state across security boundaries that would mitigate it? Perhaps make it exportable and importable and let the os kernel switch it out along with the rest of the thread state.

So there's probably a reasonable way to design an architecture that still gets the benefits of speculative execution without having it leak information.

Read the papers on specter: data-dependent side channels are literally everywhere in modern processors. a single bit can be used to eke out an entire key (see valsorda's talk at this years ccc). Even fractions of a bit of data could be used to discover the entire key or secret.

Malcolm XML fucked around with this message at 00:39 on Jan 4, 2018

Subjunctive
Sep 12, 2006

✨sparkle and shine✨

Heavy_D posted:

while i'm sure the intel CEOs would never do this, the loophole of always filing a 10b5-1, and then cancelling the scheduled trade whenever your insider information indicates you'll profit by doing so, must surely qualify as a security (and exchange) fuckup

the terms of a 10b5-1 filing don’t permit that; doing so voids the protection against presumed insider trading. it’s like the first thing they tell you when you file one

where have you seen this loophole used?

mrmcd
Feb 22, 2003

Pictured: The only good cop (a fictional one).

anthonypants posted:

reading the actual lines a bit i get a sense of "A PoC that demonstrates the basic principles behind variant 1 in userspace on the tested Intel Haswell Xeon CPU, the AMD FX CPU, the AMD PRO CPU and an ARM Cortex A57."

Yeah but that variant was only reading memory in the same process, but shows the basic principal of leaking otherwise inaccessible memory via spec execution. The really bad steal the host kernel memory stuff (variants 2 and 3) only works (so far) on Intel.

You Am I
May 20, 2001

Me @ your poasting

rafikki posted:

Why do you want to move towards IT Security? What sort of skills do you currently have, and what sounds interesting? IT Security is a broad field so you're going to have to give us some more details. I've never done auditing as an actual job position, but it sounds awful to me at least. I'm sure some people enjoy that sort of thing.

Sorry, was a bit vague about my post, as I'm a newbie to this stuff. I have been in the IT industry for 15+ years and one thing that still shocks me is the lax IT security that most places have, including my current employer.

I guess I am leaning towards network security, but also some auditor skills will be useful to work out risks with existing or new systems within a workplace.

For example I have having a tough time understanding this latest Intel bug, as programming is a very weak skill I have, so if there's a resource or website that can dumb stuff like that down to me, and also help me learn about exploits like this, it would be helpful.

hobbesmaster
Jan 28, 2008

I’m still confused by how they actually get the bytes out of the incorrect speculative branch that accessed the forbidden cache line

Malcolm XML
Aug 8, 2009

I always knew it would end like this.

hobbesmaster posted:

I’m still confused by how they actually get the bytes out of the incorrect speculative branch that accessed the forbidden memory

i think they observe the effects of the instructions that follow the incorrect branch. Section 6 in the spectre paper describes possible avenues to leak info

mrmcd
Feb 22, 2003

Pictured: The only good cop (a fictional one).

hobbesmaster posted:

I’m still confused by how they actually get the bytes out of the incorrect speculative branch that accessed the forbidden cache line

Read section 1. You basically make the CPU speculatively read something your code shouldn't be able to, and then infer data based on what survives in the cache. The execution is rolled back and the attacker code never sees the registers, but the L1 cache isn't.

Also,


quote:

Other microarchitectures
Our research was relatively Haswell-centric so far. It would be interesting to see details e.g. on how the branch prediction of other modern processors works and how well it can be attacked.

So AMD might look like assholes in a few months.

flakeloaf
Feb 26, 2003

Still better than android clock

hobbesmaster posted:

I’m still confused by how

:same:

and i love it

hobbesmaster
Jan 28, 2008

mrmcd posted:

but the L1 cache isn't.

the key part I missed

pseudorandom name
May 6, 2007

mrmcd posted:

Read section 1. You basically make the CPU speculatively read something your code shouldn't be able to, and then infer data based on what survives in the cache. The execution is rolled back and the attacker code never sees the registers, but the L1 cache isn't.

Also,


So AMD might look like assholes in a few months.

KAISER/PTI seems to be purely for Meltdown, which is specifically what AMD is claiming they aren't vulnerable to.

Spectre appears to require compiler modifications and manually updating a bunch of hand-written assembly, which wasn't public until now and AMD hasn't commented on.

Wiggly Wayne DDS
Sep 11, 2010



if you want to understand it there's a bunch of good explanations on side-channel attacks from 34c3, including branch prediction

apseudonym
Feb 25, 2011

Failed speculative executions need to be indistinguishable from them not happening at all

Else sadness

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Kuvo
Oct 27, 2008

Blame it on the misfortune of your bark!
Fun Shoe

this is crazy


lmao

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